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Pennsylvania State University; sourced from slides and partially from the Zybook
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Classes of Computers
Desktop, server, and embedded computers
Algorithm determines…
…number of operations executed
Architecture determines…
…number of machine instructions executed per system
CPU/RAM determines…
…how fast instructions are executed
High-level language
Level of abstraction closer to problem domain; provides for productivity and portability
Assembly language
Textual representation of instructions
Hardware representation
Binary digits (bits); encoded instructions and data
Datapath
Within a CPU, performs operations on data
Control Unit
In a CPU, sequences datapath, memory
Cache Memory
Small fast SRAM memory for immediate access to data
Volatile Memory
Main memory, loses instructions and data when powered off
Non-Volatile Memory
Secondary memory, retains data when powered off
Throughput
Total work done per unit time
Performance Equation
1/Execution Time
Elapsed Time
Total response time, including ALL aspects; determines system performance
CPU Time
Time spent processing a given job; different programs are affected differently by CPU and system performance
ALU
In CPU, the Arithmetic and Logic Unit
CPU Time Equation
Time = Cycles/Frequency
4 Main Structural Components of a Computer
CPU, Memory, I/O, System Interconnection
4 Main Structural Components of a CPU
Control Unit, ALU (Arithmetics and Logic Unit), Registers, System Interconnection
Cache Memory
Layers of memory between processor and main memory; speeds up memory access by placing data closer to the core that’s likely to be used in the future
Moore’s Law
Theory that number of transistors that can be put on a single chip would double every year
Power equation in CMOS
P = CV²F
Power Wall
We can’t reduce voltage further nor can we remove more heat
Multicore Processors
More than one processor per chip, requires parallel programming which is difficult due to synchronization and communication optimization issues
Wafer
A wafer of silicon is divided into a matrix of small areas, each a few millimeters square
Chips
Make up a silicon wafer, contains many gates and/or memory cells plus a number of input/output attachment points
4 Desirable Characteristics of a Benchmark Program
Portability: written in a high-level language
Representation: representative of a particular programming domain
Consistency: will produce consistent results when run under the same conditions
Readability: results should be easy to understand
SPEC stands for…
Standard Performance Evaluation Corporation
SPEC
Programs used to measure performance, develops benchmarks for CPU, I/O, and more. A
Amdahl’s Law Equation
T = T_unaffected + T_affected/improvement factor
Amhdal’s Law
Law that deals with the potential speedup of the program using multiple processors over just one
MIPS Formula
Clock rate / (CPI * 10^6)
MIPS the performance metric stands for…
Millions of Instructions Per Second
MIPS the instruction architecture stands for…
Microprocessor without Interlocked Pipelined Stages
Big-endian
Lower addresses are sent to the leftmost bytes of a word (12 34 56 78). MIPS operates in this mode
Little-endian
Lower addresses are sent to the rightmost bytes of a word (78 56 34 12)
Register Transfer Notation for
add $s0, $s1, $s2
$s0 ← [$s1] + [$s2]
RISC stands for…
Reduced Instruction Set Computers
RISC
These architectures have one-word instructions and require arithmetic operands to be in registers
CISC stands for…
Complex Instruction Set Computers
CISC
These architectures have multi-word instructions and allow operands directly from memory
Load/Store Architecture
Architecutres in which only load and store instructions are used to access memory operands
Design Principle 1
Simplicity favors regularity
Temporary registers in MIPS range from…
$t0 to $t9
Saved registers in MIPS range from…
$s0 to $s7
Design Principle 2
Smaller is faster
Design Principle 3
Make the common case fast
3 Differences between Registers vs Memory
Registers are faster to access
Registers require less load/store instructions
Compiler must use registers for variables as much as possible
R Format
op, rs, rt, rd, shamt, funct
MIPS Register File
Holds thirty-two 32-bit registers; two read ports, one write port
Which field is never used when an R-type operation is called that only requires two register fields (e.g. sll or srl)
rs
sll
sll rd, rt, shamt | shift rt left by shamt bits
srl
srl rd, rt, shamt | shift rt right by shamt bits
and
and rd, rs, rt | bitwise AND rs and rt
or
or rd, rs, rt | bitwise OR rs and rt
andi
andi rt, rs, const | bitwise AND rs and const
nor
nor rd, rs, rt | bitwise NOR rs and rt
Design Principle 4
Good design demands good compromises
beq
beq rs, rt, Label | if rs ≠ rt then branch to Label
bne
bne rs, rt, Label | if rs = rt then branch to Label
j <== This is the letter J btw the font on this site kinda sucks
j Label | unconditonally jump to Label
lw
lw rt, const(rs) | load word from rs with const bytes offset
slt
slt rd, rs, rt | set rd to 1 if rs is less than st, else 0
sltui
sltui rt, rs, const | set rd to 1 if unsigned rs is less than unsigned const, else 0
6 Steps to Call a Procedure
Place parameters in registers
Transfer control to procedure
Acquire storage for procedure
Perform procedure’s operations
Place result in register for caller
Return to place of call
Argument registers are prefixed with…
$a
Result values registers are prefixed with…
$v
Global pointer register for static data
$gp
Stack pointer register
$sp
Frame pointer register
$fp
Return address register
$ra
jal
jal Label | Puts following instruction address in $ra and jumps to a labelled procedure
jr
jr $ra | Jumps back to $ra, can be used for computed statements like switch/case statements
Instructions to save registers $s0, $s1 on stack
addi $sp, $sp, -8
sw $s0, 0($sp)
sw $s1, 4($sp)
Instructions to load registers $s0, $s1 from stack
lw $s0, 0($sp)
lw $s1, 4($sp)
addi $sp, $sp, 8
2 Things to Save When Calling a Nested Non-Leaf Procedure
Return address
Arguments and temporaries needed after the call
Stack grows in which direction?
Downwards
4 memory layout elements from top to bottom
Stack/heap, static data, program code, reserved
lb
lb rt, const(rs) | Load byte from rs with offset const bytes, places it in the rightmost 8 bits of a register
lui
lui, rt, const | Copies const into upper 16 bits of rt, and clears the remaining bits of rt to 0
Rewrite beq $s0, $s1, Label to be able to jump to Label if Label is greater than 16 bits away
bne $s0, $s1, Label2
j Label
Label2: …
The 5 Addressing Modes
Register, immediate, PC-Relative, base, and pseudo-direct addressing
Immediate addressing
Where a numeric value is embedded in the instruction as an operand
Register addressing
A source/destination operand is specified as from one of the general-purpose registers
PC-Relative addressing
Data specified by offset relative to the program counter; used by branch instructions
Base addressing
Data/instruction memory location is specified as an assignment offset from a register; used by lw, lb, sw, etc.
Pseudo-direct addressing
The memory address is embedded in the instruction; used in j
Pointer
A variable that uses its own name to identify an address
Indirection
Referencing a value through a pointer
4 Stages of Compiling a Program
Compiler, Assembler, Linker, Loader
Compiler
Converts a high-level language program, like a C program, to an assembly language program
Assembler
Converts an assembly language program to an object module in machine language
Linker
Combines multiple object modules into an executable machine language program
Loader
Places executable file into memory to be run by the computer
3 Steps of the Linker
Place code and data modules symbolically in memory
Determine addresses of data/instruction labels
Patch both internal and external references
6 Steps of Loading a Program / the Loader
Read header to determine segment sizes
Create a virtual address space
Copy text and initialized data into memory
Set up arguments on stack
Initialize all registers
Jump to startup routine
Dynamic linking
Only link or load a library procedure when it is called during execution, rather than when the program is compiled