1/143
Chapter 1-4
Name | Mastery | Learn | Test | Matching | Spaced |
|---|
No study sessions yet.
computer architecture
those attributes of a system visible to a programmer
direct impact on logical execution of a program
Instruction Set Architecture (ISA)
instruction formats, opcodes, registers, and data memory
computer organization
operational units and their connections
Organizational attributes
hardware details transparent to the programmer
function
operation of each individual component as part of structure
data processing
data storage
data movement
control
4 basic functions of a computer
data processing
data may take a wide variety of forms, and the range of processing requirements is broad
data storage
computer must temporarily store at least those pieces of data that are being worked on
data movement
computer’s environment consists of devices that serve as either sources or destinations of data
control
manages the computer’s resources
structure
the way in which the components are interrelated
CPU
controls the operation and performs the data processing functions
control unit
controls the operation of CPU
arithmetic and logic unit (ALU)
data processing function
registers
provides storage
CPU interconnection
some mechanism for communication
main memory
stores data
input/output
moves data between the computer and its external environment
system interconnection
provides communication among CPU
core
individual processing unit on a processor chip
processor
piece of silicon combining one or more cores
motherboard
main printed circuit board
chip
single piece of semiconducting material
integrated circuit
resulting product
charles babbage
invented calculator
1st Generation of Computers
used vacuum tubes for digital logic elements and memory
stored program concept
fundamental design and 1st used in the IAS computer
john von neumann
mathematician who proposed stored-program concept on a computer called EDVAC
electronic discrete variable computer
meaning of EDVAC
transistors
solid-state device made from silicon
invented at Bell Labs in 1947
microelectronics
small electronics
gate
implements a single boolean or logical function
memory cell
device that can store 1 bit of data
semiconductor memory
construction of the processor out of integrated circuit chips
fairchild
produced the first relatively capacious semiconductor memory
embedded systems
use of electronics and software within a product
internet of things (IoT)
expanding interconnections of smart devices ranging from appliances to tiny sensors
information technology
PCs, servers, routers, firewalls
operational technology
medical machinery, kiosks, non-IT companies
personal technology
smartphones, tablets, eBooks, wireless
sensor/actuator technology
single-purpose devices bought by consumers
embedded operating systems
take an existing OS and adapt it for the embedded applications
design and implement an OS intended solely for embedded use
cloud computing
a model for enabling ubiquitous, convenient, on-demand network access
cloud networking
the networks and network management functionality that must be in place
cloud service provider
maintains computing and data storage resources that are available on the internet
software as a service
provides service in the form of software
platform as a service
service in the form of platform
infrastructure as a service
provides virtual machines and other abstracted hardware
hardwired program
process of connecting the various components in the desired configuration
data and instructions are stored in a single read-write memory
the contents of this memory are addressable by location
execution occurs in a sequential fashion
3 key concepts of von Neumann architecture
reads/fetches
executes
two steps of instruction processing
instruction cycle
processing require for a single instruction
processor-memory
processor-I/O
data processing
control
4 categories of instruction fetch and execute
processor-memory
data may be transferred from processor to memory vice versa
processor-i/o
data may be transferred to or from a peripheral device by transferring between the processor and I/O module
data processing
the processor may perform some arithmetic or logic operation on data
control
an instruction may specify that the sequence of execution is altered
instruction address calculation (iac)
instruction fetch (if)
instruction operation decoding (iod)
operand address calculation (oac)
operand fetch (of)
data operation (do)
operand store (os)
instruction cycle states
instruction address calculation
determine the address of the next instruction to execute
instruction fetch
read instruction from its memory location into the processor
instruction operatioon decoding
analyze instruction to determine type of operation to perform
operand address calculation
determine the address of the operand
operand fetch
fetch the operand from memory
data operation
perform the operation indicated
operand store
write the result into memory or out to I/O
interrupts
a way to improve processing efficiency
multiple interrupts
a program may be receiving data from communications line and printing results
disabled interrupts
processor can and will ignore the interrupt request signal
I/O functions
exchange data directly with the processor
interconnection structures
a computer consists of a set of components of 3 basic types
bus interconnection
communication pathway connecting two or more devices
system bus
a bus that connects major computer components
data lines
provide a path for moving data among system modules
data bus
may consist of separate lines
width of data bus
key factor in determining overall system performance
address lines
used to designate the source or destination of the data on data bus
width of the address bus
determines the maximum possible memory capacity
control lines
used to control access to and the use of data and address lines
control signals
transmit both command and timing information
timing signals
indicate the validity of data and address information
command signals
specify the operations to be performed
memory write
memory read
i/o write
i/o read
transfer ACK
bus request
bus grant
interrupt request
interrupt ACK
clock
reset
typical control lines
memory write
cases data on the bus to be written into the address location
memory read
causes data from the addressed location to be placed on the bus
i/o write
causes data on the bus to be output to the addressed i/o port
i/o read
cases data from the addressed i/o port to be placed on the bus
transfer ack
data have been accepted from the bus
bus request
module needs to gain control of the bus
bus grant
module has been granted control
interrupt request
interrupt is pending
interrupt ack
pending interrupt has been recognized
clock
used to synchronized operations
reset
initializes all modules
quickpath interconnect (QPI)
introduced in 2008
a four-layer protocol architecture
multiple direct connections
layered protocol architecture
packetized data transfer
characteristics of QPI
multiple direct connections
multiple components within the system enjoy direct pairwise connections to other components
packetized data transfer
data are sent as a sequence of packets
physical
actual wires carrying the signal
link
responsible for reliable transmission
routing
framework for directing packets