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CPU (Central Processing Unit)
The principal part of a digital computer system that processes program instructions using the instruction cycle; composed of the control unit, arithmetic logic unit, registers, and works with main memory.
Instruction Cycle
The repeating process used by the CPU to execute instructions: fetch, decode, execute, and store.
CPU Cache
A small, high-speed memory located close to or inside the CPU that stores frequently used data and instructions to reduce access time compared to main memory.
Arithmetic Logic Unit (ALU)
The CPU component that performs arithmetic, logical, and bitwise operations on binary data.
Control Unit (CU)
The CPU component that directs and coordinates fetching, decoding, and execution of instructions by controlling the ALU, registers, and data flow.
Registers
The smallest and fastest memory locations built into the CPU that hold data and instructions directly accessible by the processor.
Operand
A value or piece of data on which an operation is performed by the ALU.
Accumulator Register
A frequently used register that stores data taken from memory and holds intermediate or final results of ALU operations.
Memory Address Register (MAR)
A register that holds the address of the memory location to be accessed.
Memory Data Register (MDR)
A register that holds data being read from or written to the memory location specified by the MAR.
MAR and MDR
Registers that work together to facilitate communication between the CPU and main memory by handling memory addresses and data.
Program Counter (PC)
A register that contains the memory address of the next instruction to be fetched and executed.
Instruction Register (IR)
A register that holds the instruction currently being executed after being fetched using the program counter.
Pipelining
A CPU technique where fetch, decode, and execute stages of multiple instructions overlap to increase instruction throughput.
Computer Architecture
The design and structure of a computer system, including the CPU, instruction set, memory organization, and data paths.
32-bit Architecture
A system that processes 32 bits per clock cycle and can directly address up to 4 GB of RAM; supports 32-bit software.
64-bit Architecture
A system that processes 64 bits per clock cycle and can theoretically address up to 16 exabytes of RAM; supports both 64-bit and most 32-bit software.
Data Path (32-bit vs 64-bit)
The number of bits transferred within the CPU per clock cycle; wider data paths allow more data to be processed at once.
CISC (Complex Instruction Set Computing)
A CPU architecture that uses a large set of complex instructions capable of performing multiple operations per instruction.
x86 Architecture
A CISC-based family of instruction set architectures developed by Intel, known for strong software compatibility.
RISC (Reduced Instruction Set Computing)
A CPU architecture that uses a small, highly optimized instruction set designed for fast and efficient execution.
ARM (Advanced RISC Machines)
A RISC-based architecture focused on low power consumption, widely used in mobile devices, desktops, and servers, and the most widely used instruction set architecture.