CMPSC 473 Final Spring 2026

gl || 5/6/26: Currently only contains Lectures 9 through 29

LECTURE 2 (Answer is 90)

90

Structure alignment is ordered according to ___

declaration

Header files

Files that typically contain definitions, like structures and function prototypes, for a program

Source files

Files that typically contain the actual implementation for a program

(T/F) static const int CONSTANT = 1 is better than #define CONSTANT 1

T

LECTURE 3 (Answer is 224)

224

Virtualization

Hides hardware details and offers programs easier interfaces to work with

Control program

A role of the OS that controls the execution of programs to prevent errors and improper computer use

What three functionalities does an OS offer?

Virtualization, resource allocation, control program

Process

A bundle of resources in an address space

ASLR

Address Space Layout Randomization, which changes the memory locations randomly whenever we re-run a program

(T/F) A single application always contains only one process

F

LECTURE 4 (Answer is 141)

141

System call

A request from a user program to the kernel to perform a privileged operation via a trap into kernel mode

Trap

A synchronous control transfer to the kernel triggered by the execution of an instruction (e.g., exception, error, or system call).

Trap table

A table storing addresses of OS handlers for traps

What are the two major modes CPUs run in dual CPU mode?

User mode and OS/Kernel mode

What about the user mode differs it from the kernel mode?

Cannot execute privileged instructions

Interrupt

An asynchronous control transfer to the kernel triggered by an external hardware event (e.g., timer or I/O device).

Signal

An asynchronous notification delivered by the kernel to a user process, informing it of an event (e.g., error or external request), handled in user space.

What’s the signal sent by the OS in case of a segmentation fault?

SIGSEGV

(T/F) Traps can be triggered by executing privileged instructions in the user mode

T

(T/F) Mode bits indicate whether the CPU is in kernel or user mode

T

(T/F) While in the user mode, it’s possible to access privileged instructions directly

F

(T/F) All CPUs share the same set of interrupts

F

(T/F) The CPU has access to a table containing addresses of interrupt handles populated by the OS

(T/F) Both traps and interrupts allow entering the kernel mode from the user mode

T

(T/F) Signals are delivered directly by hardware to a process

F

(T/F) A page fault is a type of trap

T

(T/F) A page fault is a type of interrupt

F

(T/F) Signals can only be generated by the OS

F

(T/F) An interrupt can cause a signal to be sent to a process

T

(T/F) If a process divides by zero, the CPU raises a trap

T

LECTURE 5 TO 8 (Answer is 1)

1

Explicit allocator

When the programmer allocates and frees space

Implicit allocator

When the programmer allocates but does not free space, which is done automatically

malloc(size)

If successful, returns a pointer to a memory block of at least size bytes, otherwise returns error

free(ptr)

Frees a previously malloc’ed or realloc’ed block back to the pool of available memory

realloc(ptr, size)

If successful, changes the size of a previously allocated block

Void pointer

A pointer with no associated data type, must be typecast before dereferencing

Aggregated payload

The sum of currently allocated payloads

Internal fragmentation

When an allocated block has unused space inside itself

What three things can cause internal fragmentation?

Overhead of maintaining heap data structures, padding for alignment purposes, and explicit policy decisions

External fragmentation

When there’s enough aggregate heap memory available, but no single free block is enough

Implicit list allocation

Tracking all blocks, including free blocks, by using the size metadata of each block to effectively store them in a single linked list

Explicit list allocation

Tracking free blocks by using their next/prev blocks to traverse between free blocks, effectively storing them in doubly linked lists

Segregated free list allocation

Tracking free blocks by using the explicit list allocation and splitting its free list into different size classes

Coalescing

The act of joining two free data blocks together

What are two coalescing policies?

Immediate coalescing and deferred coalescing

What are two insertion policies for storing free lists using explicit lists?

LIFO and address-ordered

LIFO stands for…

Last In First Out

(T/F) Applications can issue an arbitrary sequence of malloc and free requests

T

(T/F) Allocators can control the amount and/or size of allocated blocks

F

(T/F) Allocators can manipulate and modify only allocated memory

F

(T/F) Allocators can move allocated blocks even after they’re malloc’ed

F

(T/F) The pattern of previous requests affects internal fragmentation

T

(T/F) The pattern of future requests affects external fragmentation

T

LECTURES 9 TO 11 (answer is 20)

20

Virtual Memory Benefits

Uses main memory efficiently, simplifies memory management, isolates address spaces

Pages

Cache blocks containing the contents of the virtual memory

DRAM cache

Another name for physical memory

Size of a page

2^p bytes where p is number of bits representing a page offset

DRAM uses the ____ cache write strategy

write-back

Write-back caching strategy

Writing to the cache copy, modified data gets marked dirty, written to memory later

Dirty bit

Indicates whether or not a page has been modified in memory, used in write-back caching

Write-through caching strategy

Writing to the cache and the memory at the same time

Page table

Array of Page Table Entries that maps virtual pages to physical pages

Page hit

When a requested virtual page is already stored in the physical memory (DRAM cache hit)

Page fault

When a requested virtual page is not stored in the physical memory (DRAM cache miss)

Page fault handler

When a page fault happens, selects a victim page, evicts it from the DRAM cache if needed, then loads the missing page into memory

ASLR

Address Space Layout Randomization randomizes address for security

How does virtual memory affect loading?

Demand paging: creates invalid PTEs and only loads pages from the executables when accessed

How does virtual memory affect linking?

Programs have the same virtual addresses across all programs

How does virtual memory enable protection?

Using PTE permission bits, which the MMU checks on every access

MMU

Memory Management Unit that translates virtual addresses to physical addresses

VPN

Virtual Page Number: Identifies which virtual page you’re in, indexes the page table

VPO

Virtual Page Offset: Identifies the byte within a found page, doesn’t change during translation

PPN

Physical Page Number: Identifies which physical page you’re in

PTBR

Page table base register: A register that points to the current process’s page table in memory

Physical address can be built from…

PPN + VPO

Locality

Programs tend to access a small set of memory locations repeatedly over short periods of time

Working set

The set of virtual pages being used by a program during a given time period

Page Table Entry contains…

Validity/permission bit, PPN

TLB

Translation Lookaside Buffer, a small hardware cache in the MMU that stores some PTEs, allowing for faster translation

How is the TLB derived from a virtual address?

It’s derived from the VPN portion of a virtual address, splitting it into TLBT and TLBI

TLBT

Translation Lookaside Buffer Tag, selects the tag of the entry within the set

TLBI

Translation Lookaside Buffer Index, selects the set in the TLB

Multi-level Page Table

A page table that breaks a single PT into multiple levels, so only portions are allocated in memory

How many bits does a VPO take?

Number of offset bits

How many bits does a VPN take?

Number of total bits in the virtual address minus the number of offset bits

How many sets does a TLB have?

2^Number of TLB Index bits

When the total active virtual memory usage (total working set) exceeds physical memory…

thrashing occurs, a performance meltdown where pages are swapped in and out continuously

(T/F) Each process has its own virtual address space

T

(T/F) The entire system has its own page table

F

(T/F) The page table is stored in the user space

F

(T/F) Each virtual page can be mapped to any physical page

T

(T/F) Once mapped, a virtual page must always be in the same physical page at different times

F

(T/F) Virtual memory allows address space larger than physical memory

T

(T/F) The TLB is set-associative

T

(T/F) The TLB is direct-mapped

F