CS 271 - Intro to Computer Architectures (Module 1)

Assembly Language programs are 'higher level' than C programs. (T/F)

False

Assembly Language programs are lower level than C program. A C program will compile into assembly on its way to Machine Code.

(True/False) Assembly Language instructions have a nearly 1:1 correspondence with Machine Code.

True

Some Assembly Languages and architectures have a 1:1 correspondence from Assembly to Machine.

(True/False) A single computer architecture may have programs written for it using more than one Assembly Language (x86, RISC-V, ...).

False

An Assembly Language is defined by an ISA (Instruction Set architecture), and is the only Assembly Language defined for that computer architecture.

(True/False) A single computer architecture may have programs written for it using more than one assembler (MASM, NASM, FASM, ...)

True

Different assemblers give software developers different capabilities in the way their assembly language programs are written, assembled, and debugged. MASM and NASM can both be used to author x86 Assembly for IA32 processors, for example. Assemblers have a many-to-one correspondence to assembly languages; that is, even though there is only one assembly language for a particular ISA, there may be several assemblers available to choose from.

What is an instruction?

An instruction is a control phrase for the computer which will be translated (with its operands) into a op code (Machine Language)

(True/False) High-level language (HLL) programs are portable to a variety of computer architectures.

True

HLL programs require compilers to create architecture-specific code.

(True/False) Assembly Language programs are portable to a variety of computer architectures.

False

Assembly Languages are architecture-specific.

System Endianness

Impacts the ordering of BYTEs in memory for data types consisting of more than 1 BYTE.

Little-Endian

The least significant BYTE is stored at the lowest memory address.

Big-Endian

The most significant BYTE is stored at the lowest memory address.

What are the smallest and largest values which can be represented with an unsigned DWORD

Smallest: 0

Largest: 232-1 = 4,294,967,295

What are the smallest and largest values which can be represented with an signed SDWORD

Smallest: -2^31 = 2,147,483,648

Largest: 2^31-1 = 2,147,483,647

How many bytes does it take to represent the following set of characters in ASCII: HELLO

Five.

One byte per ASCII character, five ASCII characters.

How many bits are there in 35 MB (note: bytes, so binary prefixes apply)

293,601,280 bits35 220 Bytes 8 bits/Byte = 36,700,160‬ Bytes * 8 bits / Byte = 293,601,280 bits

Define "Bus"

A set of parallel "wires" for transferring a set of electrical signals simultaneously.

What is the Address Bus used for?

To communicate a specific memory location for reads or writes, e.g. Read from "this address on the address bus"

Which register holds the opcode of current instruction being executed?

IR - Instruction Register

Which register points to the address of the next instruction to be executed?

IP - Instruction Pointer (EIP in IA32)

Which register holds the current machine instruction?

The Instruction Register (IR)

Which register holds the current micro-instruction?

The Control Register

What is the main purpose of caching?

Moving information from slower storage to faster storage, where it can be accessed more quickly.

In a vonNeumann architecture, how are programs organized?

Programs are stored in memory and executed according to an instruction execution cycle.

On a computer, where is simple integer math computed?

ALU - Arithmetic/Logic Unit

What component's primary duty is synchronizing processes inside a computer?

System clock

What storage unit is the closest/fastest on the chip?

Registers

How is data pulled from memory?

First, the address where the data resides is put in MAR, then on the address bus, then a 'memory read' is triggered and the data is pulled from that particular memory cell, put on the data bus, and then into the MDR.

What would you call an ordered list of organized instructions existing somewhere in memory, and associated with a data structure for storage of data?

A program!

Where is a major data transfer bottleneck in a computer, and what helps resolve it?

The data bus, because both the program instructions and the data must be retrieved from the same memory to be executed or used. Caching helps reduce the impact.

Place the following steps of the instruction execution cycle into the proper order

Fetch the instruction at the address in the Instruction Pointer into the Instruction Register.

Increment the Instruction Pointer to point to next instruction's address.

Decode the instruction in the Instruction Register.

If the instruction requires memory access, determine the memory address, and fetch the operand from memory into a CPU register, or send the operand from a CPU register to memory.

Execute the instruction.

Store resultant operands.

Why does protected mode prevent programs from changing the EIP register directly?

EIP contains the memory address of the next instruction to be fetched. Since the programmer ordinarily will not know the absolute address where any of the instructions are stored, protected mode restricts access to EIP, and allows it to be changed only by the operating system.

What is the width of the address and data buses?

32 bits

What is the size of the general-purpose registers?

32 bits

Name at least four CPU status flags.

Carry, Overflow, Parity, Auxiliary Carry, Sign, Zero

In 32-bit mode, aside from the stack pointer (ESP), what other register points to stack addresses?

Stack Segment (SS), possibly EBP depending on usage

Which flag is set when an arithmetic or logical operation generates a negative result?

Sign Flag

Which flag is set when the result of an unsigned arithmetic operation is too large to fit into the destination?

Carry Flag

Which flag is set when the result of a signed arithmetic operation is either too large or too small to fit into the destination?

Overflow Flag

If the AH register is modified by the software engineer, is there any change in the EAX register? Why or why not?

Yes, the AH register is part of the EAX register. Specifically, the bits 0-7 of the AH are exactly bits 8-15 of EAX.

What best describes the relationship from assembly language instructions to machine language instructions?

nearly one to one

Language Hierarchy: The purpose of a Compiler is to...

Convert High/Low level Program Code to Assembly/Machine Code

The linker combines object files into an executable file.

True

What type of tool can convert ARM Assembly to x86 Assembly?

Cross Assembler

What is the range of decimal values for an unsigned DWORD?

0 to 4,294,967,295

The ASCII code values for alphabetic letters (e.g. 'a') are smaller than for decimal digits (e.g. '1').

False

How many bytes long is a QUADWORD on x86 systems?

8

The two's complement of a binary value is formed by which process?

reversing (inverting) the bits and adding 1

How many bits long is a WORD on x86 systems?

16

How many binary digits are represented by a series of 4 hexadecimal characters?

16

What are components of the Control Unit?

Instruction Pointer

Instruction Register

Status Register

The CPU clock cycle length is the only contributing factor to the speed of operations on a computer.

False

During which phase of the instruction execution cycle is the instruction pointer incremented?

fetch

Please place the following steps of the instruction execution cycle in their proper order. Step 1 is?

Fetch the instruction at the address in the Instruction Pointer into the Instruction Register

Please place the following steps of the instruction execution cycle in their proper order. Step 2 is?

Increment the instruction pointer to point to the next instruction.

Please place the following steps of the instruction execution cycle in their proper order. Step 3 is?

Decode the instruction in the instruction register

Please place the following steps of the instruction execution cycle in their proper order. Step 4 is?

If the instruction requires memory access, determine the memory address, and fetch the operand from memory into a CPU register, or send the operand from a CPU register to memory

Please place the following steps of the instruction execution cycle in their proper order. Step 5 is?

Execute the instruction

Please place the following steps of the instruction execution cycle in their proper order. Step 6?

If the output operand is in memory, the control unit uses a write operation to store the data.

The status flags are implemented as individual bits within the Status Register.

True

What is the size of the EAX register?

32 bits

What is the size of the AX register?

16 bits

What is the size of the AH register?

8 bits

Which Operation Mode provides compatibility for legacy 8086 programs?

Real-Address mode

What is the name of the lowest 8 bits of the EDX register?

DL

The datatype of BYTE is what?

8-bit unsigned integer

The datatype of WORD is what?

16-bit unsigned integer

The datatype of SWORD is what?

16-bit signed integer

The datatype of DWORD is what?

32-bit unsigned integer

The datatype of SDWORD is what?

32-bit signed integer

The datatype of REAL4 is what?

32-bit IEEE short real

The datatype of REAL8 is what?

64-bit IEEE long real

What does AL refer to (8 bit register references)

Bits 0-7 of EAX

What does DH refer to (8 bit register references)

Bits 8-15 of EDX