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What is the purpose of the ALU?
It performs logic and arithmetic operations and makes comparisons. e.g. bitwise operations
What role does the Address bus play in the Fetch sequence of the Cycle?
The address from the MAR is sent along this component to Main Memory. Then it awaits a signal from the control bus.
What are the 2 components of an instruction stored in the CIR?
Opcode:Stores what to do.
Operand:What to do it to. (This could be the data or an address where the data is found )
How does cache affect CPU performance?
the fastest form of memory due to its close proximity to the CPU. So the Larger this component is the more data the CPU can access as it has a smaller distance for data to travel.
How does number of cores affect CPU performance?
This Component is essentially a copy of the CPU, therefore this allows the CPU to run multiple programs at the same time.
Weakness of multiple cores
Doubling the cores does not mean double the processing speed as the cores require time to communicate with each other-Latency between processors.
What is the purpose of the PC?
holds the address of the next instruction to be executed.
What is the purpose of the CU?
directs the flow of data between the components of the CPU and other devices connected to the computer.
What is the purpose of the MDR?
Holds data read from /to be written to memory.
What is the purpose of the CIR?
holds the current instruction being executed. An instruction is formed of a opcode and operand.
Purpose of the Address bus?
Carries the address (memory location) from the MAR to memory; Unidirectional so data can only flow from the processor to main.
Purpose of the Control bus?
Carries command and control signals to and from every other component if the CPU; Bidirectional data can flow freely from RAM-Processor and vise versa.
How does the Fetch sequence affect the PC?
this register is checked for the address of the next instruction to be executed.
How does the Fetch sequence affect the MAR?
The address location stored in the PC is copied to this register. (1)
What role does the data bus play in the Fetch sequence of the Cycle?
With the address gained from the Address bus, Main memory sends the contents of that location along this component.
How does the Fetch sequence affect the CIR?
The data received by the MDR from RAM is copied into this register.
How does the Decode sequence affect the CIR?
Now the fetch sequence has been completed. The instruction in this Register can be decoded.
How does the Execute sequence affect the MAR?
The address of the Data in RAM that the instruction will be applied to will be sent to this register.
What role does the address bus play in the Execute sequence of the Cycle?
The address from the MAR is sent along this component to Main Memory.
What role does the data bus play in the Execute sequence of the Cycle?
Depending on the decoded instruction, the contents of the location stored in RAM can be sent along this component to the MDR.
What happens to the PC when Branching?
If the Opcode of the data stored in the CIR states to Branch always (0110) then the Operand of the instruction is stored in the PC.
How does clock speed affect CPU performance?
This component controls how any FDE cycles are completed per second. (it's speed- measured in GHz). So the greater the components speed the more instructions can be executed per second.
Differences between Von Neumann and Harvard architectures
1. Uses one memory module for both data and instructions-Cannot Read/Write at the same time-More Flexible.
b. Uses a common bus for data and instructions.
c. Takes 2 cycles to complete an instruction as instruction must be fetched before execution-Slower.
Example: Used for General purpose systems: laptops etc.
2.Have multiple memory modules for data and instruction-Less Flexible but faster.
b. Individual buses for data and instructions- Can fetch instructions and transfer data simultaneously.
c. Only takes 1 cycle to complete an instruction-Faster.
Example: Used for embedded systems: microcontrollers
What is pipelining?
efficient process that allows the computer to process instruction in a streamline fashion, this allows for instructions to be accumulated and executed more efficiently.
What is the purpose of the MAR?
Holds the memory location of data that needs to be accessed.
What does the ACC hold?
It stores the results of calculations made in the CPU.
What happens to the PC at the end of the Fetch sequence?
This Component is incremented by 1. To ensure the next instruction is fetched in the next cycle.
What role does the control bus play in the Execute sequence of the Cycle?
Depending on the decoded instruction (Read or Write), the CU will send an appropriate signal along this component to main memory.
What Role does the ACC play in the Execute stage?
The contents of the MDR are now copied to this Register. The instruction is now complete.
What is the purpose of storing the operand into the PC in branching?
This allows the Program to skip to different parts of memory (essentially skipping lines of code.)
What are the 3 main factors that affect the processing speed of the CPU?
Clock speed
Cache
Number of Cores
What are the differences between CISC and RISC Processors?
RISC
-Smaller set of instructions that perform simpler operations.
-Software centric designed architecture.
-Heavily relies on RAM to store code (This can lead to bottlenecking).
-Pipelining is possible since each instruction takes one clock cycle.
-The compiler has to do more work to translate high level code into machine code.
CISC
-Larger instruction set that performs more complex operations.
-Hardware centric designed architecture..
-Less RAM is required since code is shorter.
-Many specialised instructions are made, even though only a few of them are used.
-The compiler has less work to translate high level code into machine code.
What is a GPU?
A graphics processing unit (GPU) is a co-processor which has lots of independent processors working in parallel making it very efficient at tasks such as image processing, and machine learning.
What is Contemporary Processing?
Contemporary processors use a combination of Harvard and Von Neumann architecture. Von Neumann is used when working with data and instructions in main memory, but uses Harvard architecture to divide the cache into instruction cache and data cache.
Difference between Multi Core and Parallel system
Multi-Core- multiple independent cores that can complete instructions separately which results in higher performance.
Parallel Systems- Preform similar tasks as multicore processors but with a single core using threading.
What is threading?
Threads are a way for a program to split itself into two or more simultaneously (or pseudo-simultaneously) running tasks.