Computer Org

Central Processing Unit (CPU)

has an arithmetic logic unit (ALU) and registers.

Peripheral Devices

Input/Output units and External Storage

Data memory and instruction memory are accessed through separate buses.

false

There is no external mass storage

false

Examples of performance enhancements in hardware design.

modularity, cache, parallelism, pipelining, prediction, Hierarchy of memory

Miniaturization

Less energy consumptions but limited by physical distance of atoms in the silicon substrate

Asynchronous Design

communication and synchronization problems, needs extra hardware and software for communication and synchronization

Million instructions per second (MIPS)

is a measure of a computer’s processor speed that does not take into account differences in ISAs between computers, differences in complexity between instructions. (RISC vs CISC)

Vector Extensions

Needs software support from compiler, it doesn’t automatically speed up all calculations

What is the special property of register $0?

$zero stores 0

What is the name of the register that stores a return address?

$ra

How many bits does a general-purpose MIPS register contain?

32

MIPS has 32 general registers

True

The order in which data is stored byte-wise in memory is called endianness and MIPS is big endian

True

By design, MIPS assembler instructions generally have 3 operands with fixed order, and the destination register comes first in the instruction

True

Write +21 base10 as an unsigned 8-bit number

00010101

Write -13 base10 as an 8-bit 2’s complement number

11110011

What is the largest signed number which can be represented using 8-bit 2’s complement representation?

127

What is the smallest signed number which can be represented using 8-bit 2’s complement representation?

-128

Write the decimal number 4092 as a hexadecimal number with 4 digits.

0FFC

Write the hexadecimal number 0×0F18 as an unsigned 16-bit binary number

0000 1111 0001 1000

The Zilog Z80 has 16-bit addresses. As a power of two, how many different addresses can be distinguished on a Z80?

2^16

The MIPS32 architecture provides 32-bit addresses, which makes for 4,294,967,296 distinct addresses (called 4Giga). MIPS32 is byte addressable, meaning each address points to one byte of memory. How much memory can be accessed directly with MIPS32?

4GB

The DEC Alpha architecture provides 64-bit addresses pointing to 8-byte clusters of memory. As a power of two, how many addresses can be distinguished on a DEC Alpha?

2^64

The DEC Alpha architecture provides 64-bit addresses pointing to a 8-byte clusters of memory. As a power of two, how many bytes of memory can be accessed on a DEC Alpha (without additional mechanisms)?

2^64×8 bytes

What is the directive that the next variable declaration is of type word (32 bits)?

.word

What is the directive that the next variable declaration is of type zero-terminated string?

.asciiz

What is the directive that the next block is program and not data?

.text

The branching instruction bne uses three arguments, the first two of which are registers. What kind of argument is the third argument.

label

A leaf-function is a function that does not call any other subroutine

True

The instruction j label will change the instruction point such that it points to the address referenced by label.

True

How are parameters or arguments passed to a function?

place them in $a0-$a3

How are return values passed back to a callee?

place them in $v0-$v3

What is the MIPS assembly code (not machine code) to call a subroutine or function named combinations?

jal combinations

What is the MIPS assembly code (not machine code) to return from a subroutine or function to the callee?

jr

A pointer is a variable/register holding an address

True

Pointers in MIPS cannot be change(for instance, increased) or used in calculations

False they can be changed

Two pointers that point to the same thing hold the same address

True

What is the directive that the next variable declaration is of type byte (8 bits)?

.byte

What is the directive that the next block is program?

.text

Name three ISAs other than MIPS

Dec Alpha, ARM, RISC-V, Intel x86

What is the directive that the next variable declaration is of type null-terminated string?

.asciiz

What is the directive that the next block is program and not data?

.text

What does RISC stand for?

Reduced Instruction Set Computer

What does CISC stand for?

Complex Instruction Set Computer

What does ISA stand for?

Instruction Set Architecture

What does MMU stand for?

memory management unit

What basic semiconductor device is used to build NAND (and other) DTL/RTL/TTL logic gates, without which our digital computers would not work?

Transistors

Name four architectures

MIPS, RISC V , intelx86, ARM

There is a control unit that includes an instruction register and a program counter

True

A cache is a smaller, faster memory located closer to a processor core. Caches are a means of reducing latency when a CPU is loading data or instructions.

True

Multicore designs need additional (kerel level) software support from the operating system to be usable by a (non-kernel) programmer.

True

Vector extensions perform a single instruction on multiple pieces of data. Software needs to be complied specifically for these instructions to take advantage of a speed-up.

True

Branch prediction as a method to achieve higher performance needs to be coupled with an instruction pipeline to look ahead in the instruction sequence.

true

In a computer memory is organized into a hierarchy based on response time.

true

write +67 as an unsigned 8-bit number

01000011

write -66 as an 8-bit 2’s complement number

10111110

Write the hexadecimal number 0×01FA as an unsigned 16-bit binary number.

0000 0001 1111 1010

Write the binary 8 bit number 0b10101101 as a hexadecimal number

ad

Comments in MIPS assembly start with #

true

MIPS assembly language is strongly typed, Like java

false

MIPS has 32 general purpose registers

True

What final character is used to indicate that a sequence of characters is a label?

colon :

Use variables t1,t2 to write a Java style line of code which expresses the MIPS assemble line sub $t1, $t1, $t2

t1=t1-t2;

Use variables t1,t2 to write a Java style line of code which expresses the MIPS assemble line subi $t1, $t2, 3

t1= t2 -3;

Use variables t1,t2 to write a Java style line of code which expresses the MIPS assemble line add $t1, $t2, $zero

t1=t2 +0;

A label is a string used to reference a location in memory

True

Dereferencing a pointer means accessing the resource the pointer references

True

Pointers in MIPS are just number and can be used in calculations

True

The sub instructions sub $rd, $rs, $rt works by negating the third operand with two’s complement, adding it to the second operand, and storing the result in the first operand.

True

Overflow can only occur when adding two registers(using an add instruction)

False

An add instruction may cause an overflow exception

True

MIPS uses an overflow flag to indicate when an arithmetic overflow has occurred in an operation, indicating that the signed two’s complement result would not fit in the number of bits used for the result

False

The MIPS architecture accommodates multiplication and divsion of 32-bit numbers by providing a pair of 32-bit registers with the names $m0 and $m1

false its called Hi and Lo

The special registers Hi and Lo are separate from the general registers in the CPU and are normally used for multiplication and division

True

MIPS uses shift-and-add and shift-and-subtract for multiplication and division

True

MIPS does not provide an assembly instruction to get the remainder of a division. It must be calculated as difference of the dividend and product of result and divisor.

False

There are assembly instructions to access the above special registers Hi and Lo

true

Integer division has an integer quotient and and integer remainder as a result

true

The number of bits necessary to represent the product of any n-bit number with any m-bit number is n*m

False

The number of bits necessary to represent the remainder of an integer division of an n-bit number is m.

true

The number of bits necessary to represent the remainder of an integer division of an b-bit number by an m-bit number is m

True

Floating point number representation in a digital computer is defined in a UPE standard

False

Binary floating point numbers store the sign fraction and exponent

true

Floating point numbers allow the representation of positive and or negative infinity

True

NaN is a particular value of a numeric data type which is undefined or unrepresentable such as the result of 0/0

True

A single precision float point number float uses 64 bits

False uses 32

A double precision floating number (double) uses 64 bits

true

The exponent in a single precision floating point number float uses 7 bits

false uses 8 bits

The exponent in a single precision floating point number float number is stored as two’s complement

false

The all-zero bit stream floating point number corresponds to the value 0.0

True

There are two different zeros in single precision floating point number representation float

true

An all-1 exponent indicates an infinity or NaN

True

Adding two floating point numbers involves shifting the exponent on the smaller number to align to the larger number

true

Name the four types of data path elements for MIPS listed in class

program counter, Logic gates, Multiplexer, the instruction and data memories, the register file, the ALU, and adders

Datapath elements are any unit used to operate on or hold data within a processor

true

Data paths cannot be changed during runtime in any ISA

False

Logic gates in a data path provide instant output without any propagation delay

False

a Larger data path can be made by joining more than one data path using multiplexers

True

A multiplexer selects between several input signals and forwards the selected input to a single output line

true