Chapter 10 Digital Counters

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34 Terms

1
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Parallel Loading is synchronous only.

False

2
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A counter, such as a mod-12 counter, whose modulus is less than 2(n), is called a full-sequence counter.

False

3
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In general , an n-bit counter has a maximum modulus of 2(n) and a count sequence from 1 to (2(n)-1) (i.e., all 0s to all 1s).

False

4
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In any truncated sequence counter, it is good practice to determine the next state for each unused state to ensure that if the counter powers up in one of these unused states, it will eventually enter the main sequence.

True

5
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A ring counter requires more flip-flops than a binary counter to produce the same number of unique states.

True

6
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A counter is a digital circuit that has a number of ________ whose states progress through a fixed sequence.

binary outputs

7
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Movement of data from one end of a shift register to the other at a rate of one bit per clock pulse is called:

serial shifting

8
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A ________, also called a twisted ring counter, is a serial shift register with complemented feedback from the output of the last flip-flop to the input of the first.

Johnson counter

9
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_______ is a function that allows simultaneous loading of binary values into all flip-flops of a synchronous circuit.

Parallel load

10
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A(n)_______ can be problematic because a flip-flop is not necessarily guaranteed to power up in a particular state.

unused state

11
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A table showing the required input conditions for every possible transition of a flip-flop output is a(n) ______ table.

excitation

12
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A set of flip-flops in a synchronous circuit that holds its present state is a:

memory section

13
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_______ are circuits that store and move date.

Shift registers

14
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A(n) _______ is a counter that can count up or down, depending on the state of a contol input.

bidirectional counter

15
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"A closed system of counting and adding, whereby a sum greater than the largest number is a sequence rolls over and starts from the beginning" describes:

modulo arithmetic

16
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_______ is a control function that allows a counter to progress through its count sequence when active and disables the counter when inactive.

Count enable

17
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One of the most common digital counters is a(n) _________; once is counts to 12:59:59, we can be sure that it will go to 1:00:00 next.

alarm clock

18
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________ is a special case of output decoding that produces a pulse upon detecting the terminal count, or last state, of a count sequence.

Ripple carry out or ripple clock out (RCO)

19
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The abbreviation for a n-bit shift register is ________.

SRGn

20
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________ is/are the number of states through which a counter sequences before repeating.

modulus

21
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_____________ is the number of states through which a counter sequences before repeating.

Modulus

22
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_____________ is the specific series of output states through which a counter progresses

Count sequence

23
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_____________ is a set of slip-flops in a synchronous circuit that holds its present state

Memory section

24
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_____________ is a counter that can count up or down, depending on the state of a control input.

Bidirectional counter

25
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_____________ is a counter with a descending sequence.

DOWN counter

26
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_____________ is a synchronous sequential circuit that will store and move n-bit data, either serially or in parallel, in n flip-flops.

Shift register

27
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_____________ is a counter whose flip-flops are not synchronized to the alarm clock.

Asynchronous counter

28
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_____________ is a counter with an ascending sequence.

UP counter

29
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_____________ is a sequential digital circuit whose output progresses in a predictable repeating pattern, advancing by one state for each clock pulse.

Counter

30
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_____________ is a counter whose flip-flops are all clocked by the same source and thus change in synchronization with each other.

Synchronous counter

31
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_____________ is a table showing the required input conditions for every possible transition of a flip-flop output.

Excitation table

32
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_____________ is a synchronous sequential circuit.

State counter

33
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_____________ is an asynchronous counter where only the first flip-flop is clocked by an external clock. All subsequent flip-flops are clocked by the output of the receding flip-flop, which causes an anomaly as the clock pulse travels through the flip-flops.

Ripple counter

34
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_____________ means to make a transition from the last state of the count sequence to the first state.

Recycle