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System Architecture
defines the structure of an information system5. It details the hardware, software, network, storage, and security, along with their distributed structure6. It also covers the components, their relationship, and the constraints of the system
Server/Web Architecture
A classification of system architecture which addresses the server resources, interfaces, operation methods, storage capacity management, and load balancing6. consists of a web server, web application server (WAS), and DB server
Network Design Architecture
A classification of system architecture which discusses network resources (LAN/WAN), interfaces, network equipment (hub, switch, router, gateway), and communication services (DNS, DHCP, NAT, QoS, IPv4/IPv6)
Storage Architecture
A classification of system architecture which focuses on storage capacity and performance, interface units (DAS, NAS, SAN), and storage network types
Server
A component of IS which is a computer program that provides processing power, business logic, and runs application programs6.... include the server capacity, client, layer, and interface8. In a typical web system, this processes client requests through web browsers and displays content
Network
A component of IS which Connects information system components for communication6.... this manage data flow between components and provide communication services
Storage
A component of IS which Stores the data and information processed by the system
Database
A component of IS which Provides the computing power for data processing and storage management6.... This stores data that makes, requests, modifies, or deletes information through an information system
Presentation Layer
A type of system layer which is Located at the highest level, responsible for providing interface information and user interface
Business Logic Layer
A type of system layer which Processes data based on business rules and procedures9. It is positioned between the presentation and data layers
Data Layer
A type of system layer which is The lowest layer, managing stored data
Two-tier Architecture
A type of tier architecture which Generally uses the same structure as the server architecture (client and server)9.... It is simple to implement but performance decreases as the number of users grows10. Actual cases include applications with SQL tools like PowerBuilder and Oracle10
Three-tier Architecture
A type of tier architecture which is created to overcome the limitations of two-tier architecture10. It includes Presentation, Business Logic, and Data tiers10. This structure allows for flexible development and distribution of the presentation layer, supporting various client environments10
Computer Architecture
the structural design and operational methods forming the basis of a computer system12. It describes how the CPU performs processing, accesses memory, and uses input/output devices
Central Processing Unit (CPU)
A part of the basic computer structure which executes programs
Memory
A part of the basic computer structure which stores data and instructions13. High-speed ____ is accessed quickly, while auxiliary ____ stores data permanently
I/O Devices
A part of the basic computer structure which Facilitates interaction between the user and the computer
Von Neumann Architecture
A type of computer architecture where the CPU accesses commands and data from the memory through the same pathway
Harvard Architecture
A type of computer architecture where the CPU accesses commands and data through different memory structures and pathways14. This allows for parallel processing of instructions and data, potentially improving performance
Control Unit (CU)
A CPU component that Directs the execution of instructions by managing data flow and coordinating operations within the CPU.
Arithmetic Logic Unit (ALU)
A CPU component that Performs arithmetic calculations and logical operations essential for processing data.
Registers
A CPU component that are Small, high-speed storage locations within the CPU that temporarily hold data and instructions for quick access.
Internal Bus
A CPU component that is A communication pathway that transfers data, control signals, and addresses between CPU components.
Program Counter (PC)
A key register type that Holds the memory address of the next instruction to be executed, ensuring sequential execution.
Instruction Register (IR)
A key register type that Stores the current instruction being processed, allowing the Control Unit to decode and execute it
Accumulator (AC)
A key register type that Temporarily holds intermediate results of arithmetic and logical operations performed by the ALU
General Registers
A key register type that are Versatile storage locations used for holding operands, addresses, or intermediate computation results during execution.
Instruction Cycle
The process the CPU follows to execute an instruction15. It involves Fetching the instruction from memory, Decoding the instruction, and Executing the instruction
Registers
A level of memory hierarchy which are The fastest and smallest memory located inside the CPU, used for temporary storage of immediate data and instructions.
Cache
A level of memory heirarchy which is A small, high-speed memory that stores frequently accessed data to reduce latency in fetching from main memory.
Primary Memory (RAM)
A level of memory hierarchy which is The main memory that holds active programs and data, providing fast access but losing data when powered off.
Secondary Storage (HDD/SSD)
A level of memory hierarchy which is Non-volatile storage used for long-term data retention, slower than RAM but significantly larger in capacity.
Tertiary Storage (Optical Discs/Tape Drives)
A level of memory hierarchy which is Used for archival purposes, offering high capacity but slow access speeds, often requiring manual intervention.
Sequential Addressing
A type of addressing modes where Instructions are stored in consecutive memory locations, and execution follows a sequential order.
Example: If instruction at address 1000
is executed, the next instruction is fetched from 1001
Direct Addressing
A type of addressing modes where The instruction contains the actual memory address of the operand
Example: LOAD A, 500
(Loads data from memory address 500
into register A
)
Displacement (Relative) Addressing
A type of addressing modes where The address is determined by adding an offset to the current instruction address
Example: JUMP 20
(Moves execution to an address 20
locations ahead of the current instruction).
Indexed Addressing
A type of addressing modes where The address is calculated by adding an index register value to a base address
Example: LOAD A, BASE + INDEX
(Fetches data from BASE
+ INDEX
address)
Base Register Addressing
A type of addressing modes where The memory address is determined by adding a base register value to an offset.
Example: MOV A, [BX + 10]
(Loads data from memory address BX + 10
into register A
)
Locality
The principle that programs frequently access the same memory locations
Spatial Locality
A type of locality which is The tendency of a program to access memory locations that are physically close to recently accessed locations, such as consecutive elements in an array
Temporal Locality
A type of locality which is The tendency of a program to repeatedly access the same memory locations within a short time frame, such as frequently used variables or instructions in a loop
Sequential Locality
A type of locality which is The tendency of a program to access memory locations in a predictable sequence, often following the order of instruction execution
I/O Devices
A peripheral that stores data or is processed by the CPU16. It facilitates data transfer between the CPU/memory and external devices
I/O Controller
provides an interface between the CPU and I/O devices16. It involves communication with the CPU, device selection, data buffering, and error detection
Direct Memory Access (DMA)
A technique allowing I/O devices to transfer data directly to/from memory without CPU intervention, increasing system efficiency18. Its operation sequence involves the I/O device requesting ___, its controller gaining bus control, transferring data in blocks, and releasing the bus18. Its operation modes include Cycle stealing and Burst mode
DMA Cycle Stealing
A technique where the Direct Memory Access (DMA) controller temporarily takes control of the system bus to transfer small amounts of data, one cycle at a time, without significantly disrupting CPU operations
DMA Burst Mode
A method where the DMA controller transfers a large block of data in one continuous burst, fully occupying the system bus until the transfer is complete, which can temporarily halt CPU operations
Neuromorphic Chip
A technology which aims to mimic the human brain's structure and function using artificial synapses and neurons19. It is a non-Von Neumann architecture19. Compared to conventional semiconductors, it excels at parallel processing, high capacity, and high power efficiency, increasing the ability to learn and operate like the human brain
Quantum Computers
Uses quantum mechanics principles (superposition, entanglement) for computation19. Unlike conventional computers using bits (0 or 1), they use qubits which can represent 0, 1, or both simultaneously19. They are expected to solve problems intractable for classical computers
Superconducting Quantum Gates
A quantum gate type which Utilize superconducting circuits cooled to near absolute zero to create and manipulate qubits using microwave pulses, enabling fast operations and scalability
Trapped Ion Quantum Gates
A quantum gate type which Use individual ions confined in electromagnetic fields as qubits, with laser pulses controlling their quantum states, offering high coherence and precision.
Topological Quantum Gates
A quantum gate type which Rely on exotic quasiparticles called anyons, which encode information in their braiding patterns, making them highly resistant to errors and promising for fault-tolerant quantum computing
Flynn’s Taxonomy
a classification of computer architectures, proposed by Michael J. Flynn in 1966 [1] and extended in 1972. [2] The classification system has stuck, and it has been used as a tool in the design of modern processors and their functionalities
Single Instruction Single Data (SISD)
A type of parallel processing system which Processes one instruction on one data stream (e.g., single-core processor)
Single Instruction Multiple Data (SIMD)
A type of parallel processing system which Processes one instruction on multiple data streams (e.g., vector processors, GPUs)
Multiple Instruction Single Data (MISD)
A type of parallel processing system which Processes multiple instructions on a single data stream (less common)
Multiple Instruction Multiple Data (MIMD)
A type of parallel processing systems which Processes multiple instructions on multiple data streams (most common, e.g., multi-core processors, distributed systems)
Massively Parallel Processing (MPP
A classification of parallel processing systems based on memory structure where Each processor has independent memory and communicates via a network
Symmetric Multi-Processing (SMP)
A classification of parallel processing systems based on memory structure where Multiple processors share the same memory
Non-Uniform Memory Access (NUMA)
A classification of parallel processing systems based on memory structure where Processors have local memory, but can access remote memory with varying latency
Pipelining
A type of parallel processing technology which overlaps the execution phases of multiple instructions to improve instruction throughput25. A four-stage instruction pipeline includes Fetch, Decode, Execute, and Write Back stages
Superscalar
A type of parallel processing technology which executes multiple instructions simultaneously using multiple execution units
Superscalar Pipelining
A type of parallel processing technology which Combines superscalar execution with pipelining
DAS (Direct Attached Storage)
A connection between storage unit and server where it is Storage connected directly to a server
NAS (Network Attached Storage)
A connection between storage unit and server where it is Storage connected to a network, accessed by multiple servers
SAN (Storage Area Network)
A connection between storage unit and server where it is A dedicated network for storage devices, providing block-level access to servers27. Fiber Channel (FC) or iSCSI are used
Redundant Array of Independent Disks (RAID)
A technology combining multiple physical disk drives into one or more logical units for data redundancy, performance improvement, or both
RAID 0 (Striping, No Redundancy)
A RAID level where Splits data across multiple disks for improved performance but offers no fault tolerance.
Example: If one disk fails, all data is lost.
RAID 1 (Mirroring)
A RAID level which Duplicates data across two or more disks, ensuring redundancy but reducing usable storage capacity.
Example: If one disk fails, the other contains an exact copy of the data.
RAID 5 (Striping with Parity)
A RAID level which distributes data and parity information across multiple disks, allowing recovery from a single disk failure.
Example: If one disk fails, missing data can be reconstructed using parity.
RAID 6 (Striping with Double Parity)
A RAID level which similar to RAID 5 but stores two parity blocks, enabling recovery from two simultaneous disk failures.
Example: If two disks fail, data can still be reconstructed
RAID 10 (RAID 1 + RAID 0, Mirrored Striping)
A RAID Level which Combines RAID 1 (mirroring) and RAID 0 (striping) for both performance and redundancy but requires at least four disks.
Example: Data is striped for speed and mirrored for fault tolerance.
RAID 50 (RAID 5 + RAID 0, Striped Parity Arrays)
Combines RAID 5 (striping with parity) and RAID 0 (striping) for improved performance and fault tolerance, requiring at least six disks.
Example: Faster read/write speeds with redundancy, but more complex recovery.
Data Deduplication
A technique used to eliminate duplicate copies of data by storing only unique instances and replacing redundant data with references to the original, thereby optimizing storage space and improving efficiency
Disk Scheduling
Algorithms used by the operating system to manage the order of disk I/O requests, aiming to minimise seek time and improve performance
Access Time
A disk scheduling metric which represents the total time required to retrieve data from the disk, including seek time, rotational latency, and transfer time.
Seek Time
A disk scheduling metric which measures the time taken for the disk’s read/write head to move to the correct track where the requested data is stored
Rotational Latency
A disk scheduling metric which accounts for the delay caused by waiting for the desired sector to rotate under the read/write head after reaching the correct track
Transfer Time
A disk scheduling metric which indicates the time required to move data from the disk to memory once the correct sector is positioned under the read/write head
Throughput
A disk scheduling metric which quantifies the rate at which the disk can process I/O requests over a given period, typically measured in requests per second
Response Ti
A disk scheduling metric which defines the total time taken from when a request is made until the requested data is delivered, including all delays
First Come First Serve (FCFS)
A disk scheduling algorithm that processes requests in the order they arrive, making it simple but potentially leading to long seek times if requests are scattered across the disk
SSTF (Shortest Seek Time First)
A disk scheduling algorithm that selects the request with the minimum seek time from the current head position, prioritizing nearby requests to reduce overall movement.
SCAN
A disk scheduling algorithm where the disk arm moves in one direction, servicing requests along the way, then reverses direction once it reaches the last request in that direction
C-SCAN
A disk scheduling algorithm similar to SCAN, but the arm only services requests in one direction; after reaching the end, it returns to the beginning without servicing requests on the return trip.
LOOK
A disk scheduling algorithm similar to SCAN, but the arm only travels as far as the furthest request in one direction before reversing, avoiding unnecessary movement
C-LOOK
A disk scheduling algorithm similar to C-SCAN, but the arm only travels as far as the furthest request in one direction before returning directly to the furthest request in the opposite direction
Linear Tape-Open (LTO) Tape Drives
A backup storage technology that uses high-capacity magnetic tape cartridges for long-term data storage, offering reliability, scalability, and cost-effectiveness for archival purposes
Virtual Tape Library (VTL)
A backup storage technology that emulates traditional tape storage using disk-based systems, improving backup speed and retrieval while maintaining compatibility with existing tape-based backup software.
Lossly Compression
A graphic compression technology that preserves the original data perfectly, ensuring no loss of quality while reducing file size, commonly used in PNG and GIF formats.
Lossy Compression
A graphic compression technology that achieves higher compression by discarding some data, resulting in reduced file size but potential quality loss, commonly used in JPEG and WebP formats
H.264
A video coding standard that efficiently compresses video while maintaining good quality, widely used for streaming, Blu-ray discs, and video conferencing.
HEVC (High Efficiency Video Coding)
A video coding standard that provides better compression than H.264, reducing file sizes while maintaining high quality, commonly used for 4K and HDR video streaming
Embedded System
a computer system designed to perform a specific function within a larger system35. It typically consists of a microprocessor/microcontroller and a program optimised for that specific function
Determinacy
A characteristic of embedded software that ensures predictable behavior, meaning the system responds consistently to the same inputs under defined conditions
Timeliness
A characteristic of embedded software that requires tasks to meet strict deadlines, ensuring real-time responsiveness in applications like automotive control systems and medical devices
Concurrency
A characteristic of embedded software that enables handling multiple tasks simultaneously, such as managing sensor inputs, user interactions, and system operations in parallel
Heterogeneity
A characteristic of embedded software that allows interaction with diverse hardware and software components, ensuring compatibility across different processors, communication protocols, and peripheral devices
Information System Implementation
involves constructing complex systems consisting of hardware, software, and human resources41. Recent trends include integrating technologies like virtualisation, cloud, and big data41
Web system architecture
A common structure including client, web server, web application server (WAS), and database