DIC201 Progress Test 1 Practice - Ch1-4

0.0(0)
Studied by 0 people
call kaiCall Kai
Locked
learnLearn
examPractice Test
spaced repetitionSpaced Repetition
heart puzzleMatch
flashcardsFlashcards
GameKnowt Play
Card Sorting

1/25

encourage image

There's no tags or description

Looks like no tags are added yet.

Last updated 7:02 AM on 9/20/26
Name
Mastery
Learn
Test
Matching
Spaced
Call with Kai
Chat

No analytics yet

Send a link to your students to track their progress

26 Terms

1
New cards

Q1 (Ch1): Which statement correctly distinguishes an analog quantity from a digital quantity? A) Analog has discrete values; digital has continuous values B) Analog has continuous values; digital has a discrete set of values C) Both have continuous values, just different voltage ranges D) Digital quantities can only be represented in decimal

B) Analog has continuous values; digital has a discrete set of values

2
New cards

Q2 (Ch1): A digital waveform has a period of 4 microseconds and a pulse width (HIGH time) of 1 microsecond. What are its frequency and duty cycle? A) 400 kHz, 25% B) 250 kHz, 40% C) 250 kHz, 25% D) 4 MHz, 75%

C) 250 kHz, 25%

3
New cards

Q3 (Ch1): What distinguishes a periodic digital waveform from a nonperiodic one? A) Periodic waveforms only occur in analog circuits B) A periodic waveform repeats at a fixed time interval; a nonperiodic one does not C) Nonperiodic waveforms always have a 50% duty cycle D) Periodic waveforms cannot contain pulses, only sine waves

B) A periodic waveform repeats at a fixed time interval; a nonperiodic one does not

4
New cards

Q4 (Ch1): Which statement about the three basic logic functions is correct? A) An AND gate's output is HIGH when any input is HIGH B) An OR gate's output is HIGH only when all inputs are HIGH C) A NOT gate's output is the complement of its single input D) An OR gate's output is LOW when any input is HIGH

C) A NOT gate's output is the complement of its single input

5
New cards

Q5 (Ch1): What is the key difference between combinational and sequential logic? A) Combinational logic has memory; sequential logic does not B) Sequential logic output depends only on the current inputs C) Combinational output depends only on current inputs (no memory); sequential output depends on current inputs plus previous state (has memory) D) There is no functional difference, only naming convention

C) Combinational output depends only on current inputs (no memory); sequential output depends on current inputs plus previous state (has memory)

6
New cards

Q6 (Ch2): Convert 1011011 (binary) to decimal, hexadecimal, and octal. A) 91, 5B(16), 133(8) B) 91, 5A(16), 133(8) C) 83, 5B(16), 123(8) D) 91, 5B(16), 143(8)

A) 91, 5B(16), 133(8)

7
New cards

Q7 (Ch2): Convert decimal 173 to binary using the sum-of-weights method. A) 10101101 B) 10101110 C) 11001101 D) 10110101

A) 10101101

8
New cards

Q8 (Ch2): Represent decimal -45 as an 8-bit signed binary number using 2's complement. A) 11010010 B) 11010011 C) 10101101 D) 11001101

B) 11010011

9
New cards

Q9 (Ch2): Add these signed 8-bit 2's complement numbers: 01111000 + 00010100. What's the result, and does overflow occur? A) 10001100, overflow occurs B) 10001100, no overflow C) 01001100, overflow occurs D) 10001101, no overflow

A) 10001100, overflow occurs

10
New cards

Q10 (Ch2): Convert decimal 39 to BCD (8421 code). A) 0011 1001 B) 0100 1001 C) 0011 1000 D) 0010 1001

A) 0011 1001

11
New cards

Q11 (Ch2): Convert binary 1101 to Gray code. A) 1011 B) 1101 C) 1110 D) 0111

A) 1011

12
New cards

Q12 (Ch2): Why is Gray code preferred over pure binary in devices like rotary shaft encoders? A) It uses fewer bits than binary for the same range B) Only one bit changes between adjacent values, reducing the risk of an erroneous reading during a transition C) Gray code values are always even D) It's easier to convert directly to decimal

B) Only one bit changes between adjacent values, reducing the risk of an erroneous reading during a transition

13
New cards

Q13 (Ch3): For a 3-input NOR gate with inputs A, B, C, when is the output HIGH? A) When at least one input is HIGH B) When all three inputs are HIGH C) Only when all three inputs are LOW (A=B=C=0) D) When exactly two inputs are HIGH

C) Only when all three inputs are LOW (A=B=C=0)

14
New cards

Q14 (Ch3): Why is the NAND gate called a "universal gate"? A) It has more inputs than any other gate B) Any logic function (AND, OR, NOT, etc.) can be implemented using only NAND gates C) It's the fastest logic gate available D) It can only be used in combinational circuits, not sequential ones

B) Any logic function (AND, OR, NOT, etc.) can be implemented using only NAND gates

15
New cards

Q15 (Ch3): For a 2-input XOR gate, when is the output HIGH? A) When both inputs are the same (both 0 or both 1) B) When the inputs are different (exactly one is HIGH) C) When both inputs are HIGH D) When both inputs are LOW

B) When the inputs are different (exactly one is HIGH)

16
New cards

Q16 (Ch3): Input A is HIGH for the first half of a clock period; input B is HIGH for the entire period. What does the output of an AND gate driven by A and B look like? A) HIGH for the whole period B) LOW for the whole period C) HIGH for the first half, LOW for the second half D) HIGH for the second half only

C) HIGH for the first half, LOW for the second half

17
New cards

Q17 (Ch3): What is the dual (equivalent) symbol for a NAND gate, and when would you use it in a logic diagram? A) A NOR symbol; use it when the gate functions as a NOR B) A negative-OR symbol (OR shape with input bubbles); use it when the gate is functioning as a negative-OR, to make the diagram easier to read C) A plain AND symbol with no bubble; used interchangeably at all times D) There is no dual symbol for NAND, only for NOR

B) A negative-OR symbol (OR shape with input bubbles); use it when the gate is functioning as a negative-OR, to make the diagram easier to read

18
New cards

Q18 (Ch3): For an alarm system where the output should be HIGH only when door sensor D is HIGH AND the system is armed S is HIGH, which single gate implements this? A) OR gate B) NAND gate C) AND gate D) XOR gate

C) AND gate

19
New cards

Q19 (Ch4): Simplify F = AB + AB'. A) F = A B) F = B C) F = AB D) F = 1

A) F = A

20
New cards

Q20 (Ch4): Simplify F = A + A'B. A) F = A B) F = A + B C) F = AB D) F = B

B) F = A + B

21
New cards

Q21 (Ch4): Apply DeMorgan's theorem to fully expand (A' + BC)'. A) A'B'C' B) A' + B'C' C) AB' + AC' D) A'BC

C) AB' + AC'

22
New cards

Q22 (Ch4): Apply DeMorgan's theorem to fully expand (AB'C)'. A) A' + B + C' B) A'.B.C' C) A + B' + C D) A' + B' + C'

A) A' + B + C'

23
New cards

Q23 (Ch4): For F = A + BC (3 variables A, B, C), how many minterms (rows where F=1) are in its truth table? A) 3 B) 4 C) 5 D) 6

C) 5

24
New cards

Q24 (Ch4): Given a 3-variable K-map with minterms 1, 3, 5, 7 = 1 (all others 0), find the simplified SOP. A) F = A B) F = C C) F = A'C D) F = B

B) F = C

25
New cards

Q25 (Ch4): Given a 4-variable K-map with minterms 4, 5, 6, 7, 12, 13, 14, 15 = 1 (all others 0), find the simplified SOP. A) F = A B) F = B C) F = AB D) F = C

B) F = B

26
New cards

Q26 (Ch4): Simplify F = A'B'CD + A'B'CD' + AB'CD + AB'CD' using a K-map. A) F = B'C B) F = B'D C) F = A'C D) F = BC'

A) F = B'C