Lecture_16-CSCI_U310_01-Jahangir_Majumder-Spring_2025

What is the primary topic discussed in Lecture 16 of CSCI U310?

Memory Technology, specifically Direct-Mapped Cache.

What is an index in the context of Direct-Mapped Cache?

Specifies the cache index, or which 'row' of the cache to look in.

What does the offset in Direct-Mapped Cache indicate?

It specifies which byte within the block we want after finding the correct block.

What is a tag in Direct-Mapped Cache terminology?

The remaining bits after the offset and index are determined, used to distinguish between memory addresses that map to the same cache location.

What does a valid bit represent in a cache?

Indicates whether data is present in a cache location (1 = present, 0 = not present).

How can you calculate the size of the index in a Direct-Mapped Cache given a 16KB cache and 4-word blocks?

The index size is determined by the number of blocks; for a 16KB cache with 4-word blocks, you need 10 bits to index 1024 blocks.

What is the purpose of the hit rate in cache performance?

It is the fraction of access that hits in the cache.

What happens during a cache miss?

The cache sends the address to memory to retrieve the data that was not found in the cache.

Explain the significance of block size in cache.

Larger blocks reduce the miss rate due to spatial locality, but can increase competition for cache space.

What are the steps for memory access without cache when loading a word?

Processor issues the address, memory reads the word, memory sends the word to the processor.

Define miss penalty in the context of caching.

The time taken to replace a block from a lower level in the memory hierarchy to the cache.

What must be considered when accessing data in a Direct-Mapped Cache?

The Tag, Index, and Byte Offset fields must be identified.

How are cache entries initialized when a computer is turned on?

All entries in the cache are initialized to not valid.

In a Direct-Mapped Cache example, how are addresses divided for processing?

Addresses are divided into Tag, Index, and Offset for convenience.

What mnemonic helps to remember cache structure?

AREA (cache size, B) = HEIGHT (# of blocks) * WIDTH (size of one block, B/block).

What is the tag length in a 32-bit architecture with certain cache specifications?

The tag length is 18 bits, calculated as 32 - offset (4 bits) - index (10 bits).

What does the hit time measure in cache,”}?

Time taken to access cache memory, including tag comparison.

What happens when valid data is not present in a cache during a read operation?

The cache will load the data into its entries, setting the valid bit.

Can you describe the difference between hit rate and miss rate?

Hit rate is the fraction of successful cache accesses, while the miss rate is calculated as 1 - hit rate.

What is meant by spatial locality in cache design?

Data that is accessed close together is likely to be accessed in the future, so larger blocks can leverage this to reduce miss rates.