Computers 101: Hardware, Number Systems, CPU Architecture & Memory, Computer Architecture & Memory Hierarchy: Key Concepts and Components

CPU (Central Processing Unit)

Executes instructions via registers and ALU.

Motherboard

Connects all components; includes CPU socket, RAM slots, SATA headers, PCIe slots.

Storage Devices

HDDs, SSDs, M.2/NVMe drives connected via SATA or PCIe.

Address Bus

Specifies memory location.

Data Bus

Transfers actual data.

Control Bus

Manages timing and coordination.

Binary

Base 2 number system.

Decimal

Base 10 number system.

Hexadecimal

Base 16 number system.

Two's Complement

Represents positive and negative integers in binary.

Method for Two's Complement

Invert bits + add 1.

Range for 8-bit

−128 to +127.

Von Neumann Architecture

Shared memory for data/instructions.

CPU Instruction Cycle

Fetch → Decode → Execute.

Cache

Temporary storage for frequent data, ~0.5-10 ns speed, volatile.

RAM

Active programs and data, ~10-70 ns speed, volatile.

ROM

Firmware, boot instructions, ~100-200 ns speed, non-volatile.

Bit

0 or 1.

Byte

8 bits.

Word

CPU's native size (e.g., 32-bit, 64-bit).

Moore's Law

Transistor count doubles ~every 2 years.

Cache Miss

CPU fetches data from slower memory, increasing latency.

Program Counter (PC)

Holds the address of the next instruction to execute.

CPU

Executes instructions using registers and the ALU (Arithmetic Logic Unit).

Motherboard

Connects all components, including CPU, memory, and storage.

Bus System

Transfers data between components; includes address, data, and control buses.

Memory Hierarchy

Balances speed and capacity; faster memory (like cache) is more expensive and smaller, while slower memory (like HDD) is larger and cheaper.

Registers

Fastest temporary storage inside CPU (e.g., RAX, RBX, PC, FLAGS).

Cache (L1, L2, L3)

Very fast, small capacity, close to CPU.

RAM (SD-RAM, DDR-SDRAM)

Volatile, fast, small capacity, used during active programs.

ROM

Non-volatile, stores firmware and boot instructions.

Solid State Drives (SSD)

Non-volatile, reasonably priced, moderate speed and capacity.

Mechanical Hard Drives (HDD)

Slow, large capacity, cost-effective virtual memory.

Trade-offs

Faster storage is more expensive; hierarchy optimizes performance and cost.

Caching

Moves data up/down the hierarchy as needed for efficiency.

Memory Bus Width & Speed

Example interfaces include PCIe 4.0 x16 (32 GB/s), DDR5-5600 (44 GB/s), SATA III (600 MB/s).

Binary

Base-2 system; uses 0 and 1, fundamental for digital logic.

Hexadecimal

Base-16; each digit represents 4 bits, making binary more readable.

Binary to decimal

Sum of bits times powers of 2.

Decimal to binary

Divide by 2 repeatedly, record remainders.

Hex to binary

Convert each hex digit to 4-bit binary.

Bits, Bytes, Words

1 Byte = 8 Bits; Word size varies (16, 32, 64 bits) depending on CPU architecture.

Two's Complement

Standard for signed integers.

Sign bit

0 for positive, 1 for negative.

Instruction Cycle

Fetch, Decode, Execute, Increment PC.

Von Neumann Architecture

Stores program instructions and data in the same memory.

Processor Components

ALU: Performs arithmetic and logic operations; Control Unit: Manages instruction flow and control signals.

Bus Width & Speed

Determines how much data can transfer per cycle.

Moore's Law

Predicted in 1965 that transistor count doubles roughly every two years.

Why Computers Speak Binary

Binary: Base-2 system, on/off electrical states.

Memory Bus

Transfers data between CPU and RAM.