Types of Processor

CH2 of OCR A-Level Computer Science

Central Processing Unit (CPU)

The CPU executes one instruction at a time on a single piece of data, this is called a Single Instruction Single Data (SISD) chip.

Graphics Processing Unit (GPU)

The GPU executes one instruction of many different sets of data, this is called a Single Instruction Multiple Data (SIMD) chip.

Reduced Instruction Set Computer (RISC)

RISC is a computer architecture that utilizes a small, highly optimized instruction set. The key features include:

• Simplicity: Fewer instructions, which are designed to execute in a single clock cycle.

• Efficiency: Focus on optimizing performance through pipelining and parallel execution.

• Load/Store Architecture: Only load and store instructions access memory; all other operations are performed on registers.

RISC designs aim to improve performance and efficiency in processing tasks.

Comple Instruction Set Computer (CISC)

CISC is a type of microprocessor architecture that uses a large set of instructions, allowing for complex operations to be executed with fewer lines of assembly code. Key features include:

• Variety of Instructions: Supports a wide range of operations, including arithmetic, logic, and control.

• Variable Instruction Length: Instructions can vary in size, allowing for more complex commands.

• Memory Access: Often allows direct memory access within instructions.

CISC architectures aim to reduce the number of instructions per program, potentially improving performance for certain applications.

Random Access Memory (RAM)

Stores the computers programs and data temporarily whilst the power is on. The RAM contains the operating system, it is volatile.

Read Only Memory (ROM)

This is permanent storage where data can only be read. The ROM contains the start-up instructions, it is non-volatile.

Harvard Architecture

Harvard architecture has two stores, one for data and one for instructions, and thus it also has two buses.

Vun-Nuemann Architecture

Von-Nuemann architecture has only one store, it contains both instructions and data, and thus it only has a singular bus.

Contemporary Architecture

Contemporary architecture takes shares from both types, contains a L1$ with its instructions and data stores seperately, everything else is Von-Nuemann.