Sequential Logic and Memory Cells

These flashcards cover key concepts related to sequential logic and memory cells discussed in the lecture.

Sequential Logic

Logic circuit whose output depends on past and present inputs, incorporating memory.

SR Latch

A type of latch that uses two NOR gates to provide memory with the ability to set and reset.

D Flip-Flop

A memory element that reacts to the edge of the clock signal, typically used for synchronization.

Combinational Logic

Logic circuit with no memory; outputs depend only on the present inputs.

Finite State Machine (FSM)

A computational model that can be in exactly one of a finite number of states at any given time.

Memory Cell

The basic building block of a sequential circuit, capable of storing one bit of information.

Truth Table

A table that shows all possible input combinations to a logic circuit and their corresponding outputs.

Debounce

The process of eliminating spurious changes in a signal caused by mechanical switches.

Edge-Triggered

Refers to circuits that change state based on transitions of the clock signal, either rising or falling.

Preset and Clear Inputs

Asynchronous inputs that set or reset the state of a flip-flop regardless of the clock signal.