OCR Computer Science 1.1 (System Architecture)

CPU

Executes instructions in a cycle, controlling all computer operations.

Control Unit (CU)

Manages instruction fetch, decode, and execution within the CPU.

Arithmetic Logic Unit (ALU)

Performs arithmetic and logical operations.

Registers

Small, fast storage in the CPU for temporary data and instructions.

Cache

High-speed memory for storing frequently accessed data.

Clock

Synchronizes the CPU’s operations by controlling speed.

Buses

Pathways that transfer data, addresses, and control signals.

Fetch

Retrieves the next instruction from memory.

Decode

Interprets the instruction to determine the required action.

Execute

Performs the operation specified by the decoded instruction.

Program Counter (PC)

Holds the address of the next instruction to fetch.

Memory Address Register (MAR)

Contains the address of data or instructions to access.

Memory Data Register (MDR)

Holds data being read from or written to memory.

Current Instruction Register (CIR)

Stores the current instruction being processed.

Accumulator (ACC)

Stores intermediate results from calculations or logic operations.

Clock Speed

Determines how many cycles the CPU completes per second.

Number of Cores

More cores allow parallel processing, boosting performance.

Cache Size

Larger cache improves data access speed by storing more data.

Embedded System

A computer built for specific tasks within a device.

Real-Time Processing

Time-sensitive processing often required in embedded systems.

Input Devices

Hardware used to send data to the computer (e.g., keyboard, mouse).

Output Devices

Hardware used to display or present data from the computer (e.g., monitor, printer).

Data Bus

Transfers data between components like the CPU and memory.

Address Bus

Carries memory addresses to specify data locations.

Control Bus

Manages control signals that direct CPU and memory operations.