4.7.3 Structure and Role of the Processor and all its Components

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33 Terms

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Central Processing Unit (CPU)

the overall brain of a computer that executes instructions to run programs

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Arithmetic Logic Unit(ALU)

part of the CPU that performs all the arithmetic and logic operations

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Control Unit (CU)

part of the CPU that manages CPU activities and co-ordinates the fetch-execute cycle

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Registers

they are small high-speed storage locations for temporary data during processing.

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Program Counter (PC)

a type of register that holds the memory address of the next instruction to execute

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Current Instruction Register (CIR)

a type of register that stores the instruction currently being executed

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Memory Address Register (MAR)

a type of register that contains the memory address of the location to be read from from or written to

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Memory Data Register (MDR)

a type of register that holds the data read from or written to memory

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Status Register (SR)

a type of register that holds status bits that indicate system states, such as interrupts

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Clock

part of the CPU that generates timing signals at a regular frequency allowing for instructions to be processed

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CPU Buses

they are communication channels between the CPU and other PC components

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The Fetch-Execute Cycle

a continuous process the CPU uses to execute instructions.

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The Fetch Stage

a stage of the fetch-execute cycle where the instruction from memory is retrieved

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The Decode Stage

part of the fetch-execute-cycle where the retrieved instruction is converted to binary

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The Execute Stage

part of the fetch-execute cycle where the decoded instruction is carried out

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The Instruction Set

defines all operations a processor can perform and are stored in machine code

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Opcode

this specifies the action to be performed on the operands

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Operands

data or memory location that the opcode is performed on

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Immediate Addressing

the type of addressing where the operand contains the actual value

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Direct Addressing

the type of addressing where the operand specifies a memory address

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Logical Shift

this is a binary operation that shifts all bit either left or right

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Interrupts

a signal where another part of the computer is requesting the attention of the CPU

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Detection of an Interrupt

this is the process where the control unit identifies the changes in the status register during the fetch-execute cycle

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Handling of an Interrupt

this is the process where the CPU halts its current task, saves the volatile environment and executes an Interrupt Service Routine to process the interrupt

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Vectored Interrupt Method

this is where the ISR is specific to the type of interrupt

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Cores

a part of the CPU which can independently run its own fetch-execute cycle

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Cache

small high-speed memory built into the CPU that stores frequently used data to reduce access

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Clock Speed

this factor determines the number of cycles per second measured in GHz

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Word Length

this is the number of bits processed by the CPU as a single unit

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Address Bus width

this type of bus width determines the range of memory addresses the CPU can access

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Data Bus Width

this type of bus width determines how much data can be transferred in one cycle

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Von Neuman Architecture

this CPU architecture uses a single memory for instructions and data which can cause a bottleneck; used in most traditional computers

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Harvard Architecture

this CPU architecture separates memory for instructions and data improving speed; mostly used in embedded systems and DSPs