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Central Processing Unit (CPU)
the overall brain of a computer that executes instructions to run programs
Arithmetic Logic Unit(ALU)
part of the CPU that performs all the arithmetic and logic operations
Control Unit (CU)
part of the CPU that manages CPU activities and co-ordinates the fetch-execute cycle
Registers
they are small high-speed storage locations for temporary data during processing.
Program Counter (PC)
a type of register that holds the memory address of the next instruction to execute
Current Instruction Register (CIR)
a type of register that stores the instruction currently being executed
Memory Address Register (MAR)
a type of register that contains the memory address of the location to be read from from or written to
Memory Data Register (MDR)
a type of register that holds the data read from or written to memory
Status Register (SR)
a type of register that holds status bits that indicate system states, such as interrupts
Clock
part of the CPU that generates timing signals at a regular frequency allowing for instructions to be processed
CPU Buses
they are communication channels between the CPU and other PC components
The Fetch-Execute Cycle
a continuous process the CPU uses to execute instructions.
The Fetch Stage
a stage of the fetch-execute cycle where the instruction from memory is retrieved
The Decode Stage
part of the fetch-execute-cycle where the retrieved instruction is converted to binary
The Execute Stage
part of the fetch-execute cycle where the decoded instruction is carried out
The Instruction Set
defines all operations a processor can perform and are stored in machine code
Opcode
this specifies the action to be performed on the operands
Operands
data or memory location that the opcode is performed on
Immediate Addressing
the type of addressing where the operand contains the actual value
Direct Addressing
the type of addressing where the operand specifies a memory address
Logical Shift
this is a binary operation that shifts all bit either left or right
Interrupts
a signal where another part of the computer is requesting the attention of the CPU
Detection of an Interrupt
this is the process where the control unit identifies the changes in the status register during the fetch-execute cycle
Handling of an Interrupt
this is the process where the CPU halts its current task, saves the volatile environment and executes an Interrupt Service Routine to process the interrupt
Vectored Interrupt Method
this is where the ISR is specific to the type of interrupt
Cores
a part of the CPU which can independently run its own fetch-execute cycle
Cache
small high-speed memory built into the CPU that stores frequently used data to reduce access
Clock Speed
this factor determines the number of cycles per second measured in GHz
Word Length
this is the number of bits processed by the CPU as a single unit
Address Bus width
this type of bus width determines the range of memory addresses the CPU can access
Data Bus Width
this type of bus width determines how much data can be transferred in one cycle
Von Neuman Architecture
this CPU architecture uses a single memory for instructions and data which can cause a bottleneck; used in most traditional computers
Harvard Architecture
this CPU architecture separates memory for instructions and data improving speed; mostly used in embedded systems and DSPs