CPU Structure & Instruction Flashcards

Basic concepts of CPU structure, instruction cycle, pipelining, and RISC architecture.

CPU

The Central Processing Unit executes instructions and controls all computer operations.

ALU

The Arithmetic Logic Unit performs arithmetic and logical operations.

Control Unit

Directs and coordinates all activities inside the CPU.

Register

Small, fast storage inside the CPU used to hold data temporarily.

Program Counter ( PC )

Stores the address of the next instruction to be executed.

Instruction Register ( IR )

Holds the current instruction being executed.

Instruction Cycle

The sequence of steps the CPU follows to execute an instruction.

Fetch Stage

The CPU retrieves the instruction from memory.

Decode Stage

The CPU interprets the instruction to understand what action is needed.

Execute Stage

The CPU performs the operation instructed.

Store Stage

The CPU stores the result back into memory or a register.

Pipelining

A technique that allows multiple instruction stages to run simultaneously.

Pipeline Hazard

A situation that prevents the next instruction from executing correctly.

Data Hazard

Occurs when an instruction depends on data from a previous instruction.

Control Hazard

Occurs due to branch or jump instructions affecting execution flow.

Structural Hazard

Happens when hardware resources are insufficient.

RISC

Reduced Instruction Set Computer that uses simple and fast instructions.

RISC Charateristics

Uses fewer instructions, fixed instruction length, and fast execution.

Instruction Set

A collection of commands that the CPU can understand and execute.

Clock Cycle

The basic timing unit that synchronizes CPU operations.