1/13
Flashcards covering the fundamentals of address translation, TLB usage, demand paging, and virtual memory specifications based on the lecture notes.
Name | Mastery | Learn | Test | Matching | Spaced | Call with Kai |
|---|
No analytics yet
Send a link to your students to track their progress
Logical address
The address generated by the CPU that must be translated into a physical address for memory access.
Physical address
The actual address used to access data within the main memory.
Page table
A mapping structure stored in main memory used to translate logical page numbers to physical page frame numbers.
translation, look-aside
To speed up access to page table entries, systems typically store used page table entries in a special cache called the - - - - buffer.
Demand paging
A memory management strategy where only a subset of process pages is kept in main memory, and others are brought in only as needed upon request.
Virtual memory
A system consequence of demand paging that allows the size of a process to be virtually unlimited and not restricted by the physical main memory size.
demand paging
A process may not use all of its data all the time. An approach in which pages may be brought into the main memory as needed is called - - - -.
page fault
When using this approach (demand paging), if a process requests for data on some page and that page is not in the main memory yet, a - - - - is said to occur.
virtual, longer
In a system using this approach, logical - also known as - - addresses may be - - than physical addresses.
Logical address space
Set of all logical addresses a process can generate
Page frame
Fixed-size RAM block used to store data from virtual memory.
Page frame number (PN)
The number that represents the physical frame in main memory.
Formula: Page frame number (PN) = Physical memory size / Page frame size
Logical page number (LPN)
The number that represents the logical address in the CPU.
Formula: Logical page number (LPN) = Logical memory size / Page frame size
Memory management unit (MMU)
Translates logical (virtual) addresses generated by the CPU into physical addresses in main memory.