Computer Hardware and System Operation

Flashcards covering computer organization, the instruction cycle, memory hierarchy timings, and interrupt handling mechanisms based on the lecture material.

Processor (CPU)

The "brain" of the computer that handles control and executes instructions.

Datapath

The components of the CPU, referred to as the "flesh," that perform operations on data.

Memory

The location where programs and data reside when they are currently running.

Disk

Storage where programs and data reside when they are not currently running.

Von Neumann Model/Architecture

An abstract, machine-independent architecture defined in 1945 where CPUs decode instructions and perform operations on register contents.

Fetch

The first step of the instruction cycle which involves getting the instruction from memory.

Decode

The stage of the instruction cycle that translates an instruction into microcode that the CPU can understand and fetches operands if needed.

Execute

The final stage of the instruction cycle where the action specified in the microcode is performed.

Program Counter (PC)

A register that holds the address of the next instruction to be fetched.

Instruction Register (IR)

A register that holds the instruction currently being decoded and/or executed.

CPU State

A snapshot of the values currently held in all different registers.

Processor Cycle Time

The fundamental unit of time for a CPU, approximately $0.25\,\text{ns}$ for a $4\,\text{GHz}$ processor.

Memory Access Time

The time required for the CPU to access main memory, typically around $80\,\text{ns}$.

Context Switch Time

The time taken to switch between processes, approximately $2,500\,\text{ns}$ ($2.5\,\mu\text{s}$).

Disk Access Time

The time required to access data on a disk, approximately $25,000\,\text{ns}$ ($25\,\mu\text{s}$).

Quantum

A time unit in operating systems for scheduling, approximately $10,000,000\,\text{ns}$ ($10\,\text{ms}$).

Polling

An inefficient method of device communication where the CPU repeatedly checks a status flag to see if a device needs attention.

Interrupt

A mechanism where a device informs the CPU it has finished an operation, causing the CPU to wait until informed and then act.

Device Controller (DC)

A component managing a specific device type that includes a local buffer and a processing unit, connecting through a common bus.

Device Driver (DD)

The software that understands the specific details of a Device Controller and allows the OS to initialize it.

Interrupt Vector

A table that contains the addresses of all the service routines used to handle interrupts.

Hardware Interrupt

An interrupt triggered by a physical hardware device.

Software Interrupt (Trap/Exception)

An interrupt caused by an error (e.g., division by zero) or a user request (system call).

Interrupt Service Routine (ISR)

Separate segments of code that determine what specific action should be taken for each type of interrupt.