Computer Memory (Internal)

Computer Organization and Architecture

Key Characteristics of Computer Memory Systems

L - internal & external

C - # of words and bytes

UoT - word or block

AM - sequential, direct, random, associative

P - access time, cycle time, transfer rate

PT - semiconductor, magnetic, optical, magneto-optical

PC - volatile/nonvolatile, erasable/nonerasable

O - memory modules

Location

Capacity

Unit of Transfer

Access Method

Performance

Physical Type

Physical Characteristics

Organization

Relationship between the length in bits A of an address and the number N of addressable units is

2^A = N

Information decays naturally or is lost when electrical power is switched off

Volatile Memory

No electrical power is needed to retain information

Nonvolatile Memory

Cache is another form of

Internal memory

the natural unit of memory organization

Word Size

is usually governed by data bus width: 8 bits, 64 bits, 128 bits, 256 bits, etc.

Unit of Transfer

Memory is organized into units of data called records

Sequential access

Involves a shared read-write mechanism

Direct access

Each addressable location in memory has a unique, physically wired-in addressing mechanism

Random access

A word is retrieved based on a portion of its contents rather than its address

Associative

What are the three performance parameters used?

Access Time, Memory Cycle Time, Transfer Rate

refers to electronic data storage devices that use semiconductor technology to store digital data (RAM)

Semiconductor memory

magnetized media

Magnetic-surface memory

class of data storage systems that use light to read or write data to an underlying optical media

Optical memory

This memory cannot be altered, except by destroying the storage unit

Nonerasable memory

physical arrangement of bits to form words

Organization

faster access time

greater cost per bit

greater capacity

smaller cost per bit & slower access time

tendency of a processor to access the same set of memory locations repetitively over a short period of time

Locality of Reference (Principle of Locality)

the reuse of specific data and/or resources within a relatively small time duration

temporal locality

the use of data elements within relatively close storage locations

spatial locality

occurs when data elements are arranged and accessed linearly, such as traversing the elemtns in a one-dimensional array

sequential locality

also referred to as secondary memory or auxiliary memory

External, nonvolatile memory

a portion of main memory can be used as a buffer to hold data temporarily that is to be read out to disk

Disk cache

Draw an illustration of a Memory Cell Operation

Write: ← Data in

Read: → Sense

RAM

Random-Access Memory

ROM

Read-Only Memory

PROM

Programmable Read-Only Memory

EPROM

Erasable Programmable Read-Only Memory

EEPROM

Electrically Erasable Programmable Read-Only Memory

SRAM

Static Random-Access Memory

DRAM

Dynamic Random-Access Memory

made with cells that store data as charge on capacitors

DRAM

it is activated when the bit value from this cell is to be read or written

Address line

when does the transistor turns on and the charge stored on the capacitor is fed out onto a bit line and to a sense amplifier.

When the address line is selected

digital device that uses the same logic elements used in the processor

SRAM

Contains a permanent pattern of data that cannot be changed or added to

Read-Only Memory (ROM)

Intermediate between EPROM and EEPROM in both cost and functionality

Flash Memory

Composed of a collection of DRAM chips

Interleaved memory

Simplest of the error-correcting codes.
devised by Richard Hamming at Bell Laboratories

Hamming Code

Used both for internal memory and external memory applications

Flash memory

A very high-speed semiconductor memory which can speed up CPU

Cache Memory

Draw an illustration of a single cache

CPU, Cache, Main Memory

Draw an illustration of a three-level cache organization

CPU, L1 cache, L2 cache, L3 cache, Main memory

if the request corresponds to an element that is currently residing in the cache, it is called?

a cache hit

if the request corresponds to an element that is not currently in the cache, it is called?

cache miss

Flowchart of a Cache Read Operation

Typical Cache Organization

Elements of Cache Design:

CA - logical, physical

CS -

MF - direct, associative, set associative

RA - LRU, FIFO, LFU, Random

WP - write through, write back

LS -

NoC - single or two level, unified or split

Cache Address

Cache Size

Mapping Function

Replacement Algorithm

Write Policy

Line Size

Number of Caches

also known as virtual cache, stores data using virtual addresses

logical cache

stores data using main memory physical addresses

physical cache

One of the three techniques in mapping function.
The simplest technique, maps each block of main memory into only one possible cache line

Direct

One of the three techniques in mapping function.

Permits each main memory block to be loaded into any line of the cache

Associative

One of the three techniques in mapping function.

A compromise that exhibits the strengths of both the direct and associative approaches while reducing their disadvantages.

Set Associative

originally proposed as an approach to reduce the conflict misses of direct mapped caches without affecting its fast access time

Victim cache

It is where a main memory block can be placed in any available line of cache or cache block

Associative Mapping

uniquely identifies the block of memory while residing in the cache

tag field

identifies the element within the block that is requested by the processor

word field

interprets the address issued by the processor by dividing it into two fields

MMU

Replacement algorithm where it replaces that block in the set that has been in the cache longest with no reference to it

Least Recently Used (LRU)

Replacement algorithm where it replaces that block in the set that has been in the cache longest

First-In-First-Out(FIFO)

Replacement algorithm where it replaces that block in the set that has experience the fewest references

Least Frequently Used (LFU)

Replacement algorithm where it picks a line at random from among the candidate lines

Random

the main disadvantage of this technique is that it generates substantial memory traffic and may create a bottleneck

Write through

Portions of main memory are invalid and hence accesses by I/O modules can be allowed only through the cache

Write back

designated as level 1 cache

Internal cache

designated as level 2 cache

External cache

complicates all of the design issues related to caches, including size, replacement algorithm, and write policy

use of multilevel caches

• advantages of what type of cache?
  
  Higher hit rate

• Balances load of instruction and data fetches automatically

• Only one cache needs to be designed and implemented

unified cache

advantages of what type of cache?

• Eliminates cache contention between instruction fetch/decode unit and execution unit

• important in pipelining

split cache