Semiconductor memory

Word Line

Bit Line

Access Transistors

Feedback Transistors

Describe the steps needed to write “1” into the cell

1: Set BL = 1, (BL)’=0

2: Set wL = 1

3: M6 > M2 allowing (BL)’ to overpower the inverter loop

4: Since (BL)’=0, Q’ = 0, Q=1

How do the transistors 𝑀1 , 𝑀2, 𝑀5 compare to each other?

M1>M5>M2

How do the transistors 𝑀3 , 𝑀4, 𝑀6 compare to each other?

M3>M6>M4

How does the conductivity of transistors influence the performance of the SRAM?

Changing the conductivity changes the mobility of the semiconductor and thus changes Vs, making the threshold voltage go more negative. This affects SRAM designs as read write speeds can vary.

Explain why a sense amplifier is a necessity for a DRAM cell.

Sense amplifiers are used to detect the small differences in charge of a capacitor nad output the corresponding logic level. DRAMs need sense amplifiers for proper functionality because reading a charge from a capacity may be difficult due to the size. Sense amplifiers are programmed to resolve small bit line swings.

What does an SRAM cell use to store memory? How about a DRAM cell?

A typical SRAM cell consists of 6 MOSFETs to store one bit of data. The SRAM cell, with the help of two inverters working in a loop creates a feedback system and stores the one-bit data. A 1 transistor DRAM cell consists of a single MOSFET which charges a capacitor - that is used to store the data as a charge. Since a capacitor has a leakage current, the capacitor discharges current during a read operation. Thus, a DRAM needs constant refreshing to re-write the 1-bit information.