Intel 8088/86 Microprocessor Architecture and Registers

Comprehensive vocabulary flashcards covering the Intel 8088/86 microprocessor architecture, internal units (BIU/EU), execution principles, and specific register functions.

16-bit microprocessor

A microprocessor whose ALU, internal registers, and most instructions are designed to work with word lengths of $16$ bits.

Intel $8088$

An "$8/16$-bit microprocessor" belonging to the third generation, featuring an $8$-bit external data bus and a $16$-bit internal data bus.

Architecture

In the context of microprocessors, this term refers to the internal design and organization of the device.

Fetch and Execute principle

The entire process of reading memory, incrementing the Instruction Pointer (IP), and decoding the instruction in a stored program computer.

Pipelining Technique

Also known as the Overlap Fetch/Execute Cycle, it allows the overlapping of the execution of several instructions simultaneously by performing different cycles on different instructions concurrently.

Bus Interface Unit (BIU)

A separate processor within the $8088/86$ that fetches instructions, calculates addresses, fetches operands, and writes results in memory.

Execution Unit (EU)

An independent unit that receives program instructions and data from the BIU, executes them, and stores results in general registers.

Instruction Queue (IQ)

A First-in-First-Out (FIFO) buffer that builds a reserve of $4$ to $6$ bytes of pre-fetched instructions to allow the EU to execute instructions almost continually.

Throughput

The productivity of any machine, system, or procedure, measured in terms meaningful to the process under consideration.

Wait Mode

A condition caused when an instruction needs memory access not in the queue, when a "Branch/Jump" instruction occurs, or during execution of slow instructions.

Arithmetic Logic Unit (ALU)

A multi-operation, combinational logic digital function that receives information from registers to perform microoperations as specified by control signals.

Accumulator (AC or A register)

A multipurpose operational register (labeled AX in the $8086$) used to place the results of microoperations performed by the ALU.

Microoperation

An elementary operation, such as shift, count, add, clear, or load, that can be performed in parallel during one clock pulse period.

Control Unit (CU)

The section of the CPU that generates pre-fetched signal sequences (internal and external) timed by clock pulses to control hardware functions.

Micro-program

A sequence of microinstructions stored entirely within the CU to implement hardware control without requiring wiring changes.

Operational register

A register capable of storing binary information in its flip-flops and possessing combinational gates for data processing tasks.

Storage register

A register used solely for the temporary storage of binary information that cannot be altered as it is transferred in and out.

Program Counter (PC)

Also known as the Control Counter, it stores the address of the next instruction to be performed and increments after every fetch.

Instruction Register (IR)

A register that holds the current instruction and extracts the op-code part for the CU to decode.

Buffer Register

A register that holds addresses and data to isolate the external data buses of the CPU from its internal buses.

Status Register

A register storing the program status word, which contains status and control bits regarding the condition of a peripheral unit or CPU results.

Stack Pointer (SP)

A pointer register that holds the offset address of the item currently occupying the top of the Last-In-First-Out (LIFO) stack.

Base Register (BX)

A data register that can perform logical and arithmetic operations and has special addressing abilities to hold memory addresses pointing to variables.

Counter Register (CX)

A data register that acts as a counter for repeating or looping instructions, automatically decrementing until it equals $0$.

Data Register (DX)

A register with a special role in multiply and divide operations; for example, holding the high $16$ bits of a product during multiplication.

Source Index (SI)

An index register used for string movement instructions that usually contains an offset value from the Data Segment (DS) register.

Destination Index (DI)

An index register used as the destination for string movement instructions, usually containing an offset value from the Extra Segment (ES) register.

Base Pointer (BP)

A $16$-bit register containing the offset from the Stack Segment (SS) register, used to access data within the stack.

Instruction Pointer (IP)

A register in the BIU that contains the offset of the next instruction to be executed; it is not under direct programmer control.

Control Flags

Flags such as Trap (TF), Interrupt-enable (IF), and Direction (DF) that can be set or reset by the programmer to control processor operation.

Status Flags

Indicators reflecting microoperation outcomes, including Overflow (OF), Sign (SF), Zero (ZF), Auxiliary (AF), Parity (PF), and Carry (CF).

Code Segment (CS)

A segment register that contains the base location for executable program instructions.

Stack Segment (SS)

A segment register that defines the base location for the current program stack.

Data Segment (DS)

The default base location for memory variables and data used by a program.

Extra Segment (ES)

An additional segment register used as a base location for memory variables for various purposes.