Topic 3- Time and frequency

How are memory cells arranged in RAM?

8-bit (byte) words arranged in rows and columns (e.g., 8x8 matrix)

What does a row-select decoder do?

Decodes address lines to select a specific row in memory

10 address lines can address how many bytes?

2^10 = 1024 bytes

Name 4 types of ROM

ROM, EEPROM, UV Erasable Programmable ROM, Flash Memory

How many times can ROM be written?

Once (read many times)

Can Flash Memory be written multiple times?

Yes, but limited number of writes

What is the memory hierarchy pyramid (top to bottom)?

CPU Register → CPU Cache → RAM → Hard Disk Drive

Which is fastest: CPU Register or HDD?

CPU Register (1 nanosecond vs 10 milliseconds)

Which has larger capacity: Cache or RAM?

RAM (gigabytes vs megabytes)

Why is memory faster at the top of the pyramid?

Faster memory is more expensive, so smaller in capacity

What is the Von Neumann memory bottleneck?

Instructions and data share the same memory path → can't transfer at same time → slows CPU

How to solve the Von Neumann bottleneck?

Store instructions and data in two separate memory spaces with two separate paths

What does CPU stand for?

Central Processing Unit

What is a CPU (explain, not just acronym)?

The brain of the computer — processes instructions and data, controls everything

Where is the CPU located?

On the motherboard, under a heat sink and fan

What does the CPU do?

Fetches instructions and data from RAM/cache, decides what to do, executes, repeats

What does ALU stand for?

Arithmetic and Logic Unit

What does ALU do?

Arithmetic (add/sub/mul/div), bitwise logic (AND/OR/NOT), shifts/rotates, value comparisons (eq/neq/gt/lt)

Name 5 things ALU does

Arithmetic, bitwise logical operations, shifts/rotates, comparisons, maintains temp results

3 & 1 in binary equals?

0011 & 0001 = 0001 = dec 1

8 in binary equals?

0011

^8 in binary equals?

NOT 1000 = 0111 = dec 7

1 << 2 equals?

Shift left 0001 → 0100 = dec 4

What does Control Unit do?

Fetches instructions, decodes, executes, provides timing control, handles interrupts, provides pipelining

Name the 3 stages of instruction execution

Fetch → Decode → Execute

What happens in Fetch stage?

CPU gets instruction from memory/cache

What happens in Decode stage?

Control Unit interprets what to do

What happens in Execute stage?

ALU performs the operation

What does the Control Unit provide?

Timing and synchronisation control/ Pipelining (concurrent fetch/decode/execute stages)

What does the Control Unit handle?

Instruction vectoring (interrupts)

How is CPU speed measured?

Gigahertz (GHz)

How is CPU performance measured?

Instructions per second

What is the maximum CPU speed range?

Around 6 GHz

Name 4 techniques to improve CPU performance

Cache memories, instruction optimisations, instruction pipelines, out of order execution

How does caching improve performance?

Stores recently used instructions (e.g., local loops) in fast cache so CPU doesn't wait for RAM

What is instruction prediction?

Predict next jump target based on previous history; roll back if wrong

What is pipelining?

Concurrent Fetch/Decode/Execute stages — overlapping instructions

Which image shows pipelining?

Multiple instructions overlapping at same time

What happens if CPU predicts a loop correctly?

Bypasses the test and goto instruction — saves time

What is cache?

Very fast RAM that stores copies of frequently used data from main memory

Why is cache faster than RAM?

Cache is closer to CPU + made of faster memory (SRAM vs DRAM)

Example: 1 GHz CPU, 3 nsec cache read time = ?

CPU wait time = 3 cycles

How does cache work?

CPU requests data from cache. If not there (cache miss), copied from RAM into cache

What happens if data requested is not in cache?

Copied from RAM, possibly replacing old data in cache

What are computer buses?

Highways of information that travel at high speeds under strict timing rules

Name the 3 types of buses

Address bus, Data bus, Control bus

What do buses do?

Flow of data between major functional components (CPU, RAM, I/O)

What are buses made of?

Sets of wires or tracks on motherboards or embedded in microprocessors

Bus width is determined by?

CPU's word size (8-bit, 16-bit, 32-bit, etc.)

Bus speed is measured in?

KHz, MHz

Bus bandwidth formula?

Bandwidth (MB/sec) = width (bytes) × speed (MHz)

What does bus bandwidth measure?

Efficiency of the bus and its components

RISC stands for?

Reduced Instruction Set Computer

CISC stands for?

Complex Instruction Set Computer

CISC characteristics?

Many complex instructions, few fast registers, instructions use memory references → slower, complicated circuitry

RISC characteristics?

Few simple instructions, many fast registers, only load/store use memory → faster, simpler circuitry

Disadvantage of RISC?

RISC programs are larger (more instructions needed to do same work as CISC)

In 1976, Intel 8086 had how many transistors?

29,000 transistors (3.2 micron process)

In 2023, Intel i9 had how many transistors?

4.2 billion transistors (10 nano process)

50 years ago, 1 Mbyte core memory cost?

£100,000

Today, 1 GByte memory costs?

Tens of pounds

How much has CPU chip density increased in 50 years?

1 million times more

What does DMA stand for?

Direct Memory Access

What does DMA allow?

I/O to communicate directly with memory without CPU involvement

What is the R/W signal?

Read/Write signal — determines if memory is being read from or written to

What are column I/O circuits?

Circuits that handle data input/output for selected memory column

What is the difference between UV Erasable ROM and EEPROM?

UV Erasable needs ultraviolet light to erase; EEPROM uses electrical signals

What is the memory bottleneck problem?

Instructions and data share same path → can't transfer simultaneously → CPU waits

What is out of order execution?

CPU executes instructions not in original order to avoid waiting

What is the RISC disadvantage?

Programs are larger (more instructions needed for same task)

Which CPU architecture is simpler?

RISC (simpler instructions, simpler circuitry)

What does "quad-core" mean?

Four processing cores inside one CPU chip — can work on 4 tasks at once

What is RAM (explain, not just acronym)?

Temporary working memory — stores currently running programs and data

What happens when RAM fills up?

Computer uses virtual memory (hard drive space pretending to be RAM) — much slower

Can you upgrade RAM?

Yes — adding more RAM usually makes computer faster for multitasking

What is ROM (explain, not just acronym)?

Permanent memory that holds instructions the computer needs to start up (BIOS/UEFI)

What is stored in ROM?

BIOS/UEFI — basic instructions to boot the computer

What is cache (explain)?

Very small, extremely fast memory inside or very close to the CPU

What are cache levels?

L1 (fastest, smallest, inside CPU), L2 (bigger, slightly slower), L3 (even bigger, shared)

What is a "cache hit"?

Data found in cache → CPU gets it quickly

What is a "cache miss"?

Data not in cache → CPU must fetch from RAM (slower)

What is an HDD (explain)?

Traditional permanent storage with spinning magnetic platters

What does HDD stand for?

Hard Disk Drive

What is an SSD (explain)?

Permanent storage with no moving parts — uses flash memory chips

What does SSD stand for?

Solid State Drive

Why is SSD more expensive than HDD?

Faster technology + no moving parts = higher cost per GB

What is a computer bus (explain)?

Communication system that transfers data between components inside computer

Analogy for pipelining?

Like an assembly line — each stage works on different instruction at same time

What is the memory hierarchy?

Arrangement of memory types from fastest/smallest to slowest/largest

Why not just use all fast memory?

Fast memory is very expensive

How to solve Von Neumann bottleneck?

Harvard architecture — separate paths for instructions and data

What is a micro-controller?

Small computer on single chip — CPU + RAM + ROM all integrated

Difference between CPU and micro-controller?

CPU is just processor; micro-controller has memory and I/O on same chip