Understanding Assembly Instruction in a System

This set of vocabulary flashcards covers the fundamental concepts of assembly instructions, their structure, CPU components, the fetch-decode-execute cycle, and system bus roles as discussed in the Week 9 lecture.

Assembly Instructions

Low-level commands for the CPU that serve as a human-readable form of machine code, using mnemonics like MOV and ADD to execute hardware-level operations.

Machine Code

The lowest level of code consisting of binary ($1s$ and $0s$) that is directly executed by the hardware.

Opcode (Operation Code)

The part of an assembly instruction, written as a mnemonic, that specifies the particular operation the CPU is to perform, such as MOV, ADD, SUB, or JMP.

Operands

The data or locations of data upon which an operation acts, which can include registers (e.g., $AX$, $BX$), memory addresses (e.g., $[1000]$), or constants (e.g., $5$).

Assembler

A program used to translate assembly language mnemonics directly into binary machine code.

Label

An optional identifier used to mark specific positions in code, such as loops or jumps, to make programs easier to manage.

Comment

Extra text in assembly code starting with a semicolon ($;$) that is ignored by the assembler and used to explain code behavior for humans.

Arithmetic Logic Unit (ALU)

The CPU component often called "The Calculator" that performs arithmetic calculations and logical bitwise operations.

Control Unit

The CPU component known as "The Director" that directs instruction execution and coordinates all CPU component activities.

Registers

Small, incredibly fast storage locations situated directly inside the CPU used for holding temporary data values during processing.

Cache

A high-speed memory staging area that stores frequently used data to bypass the slower access times of RAM.

Fetch Stage

The first stage of the execution cycle where the CPU retrieves an instruction from main memory using the address in the Program Counter ($PC$).

Decode Stage

The execution cycle stage where the Control Unit interprets the Opcode, identifies required operands, and prepares hardware control signals.

Execute Stage

The final stage of the execution cycle where the ALU performs a calculation or data is moved, and status flags are updated.

Program Counter (PC)

A special register that holds the memory address of the next instruction to be fetched and increments after each fetch.

Instruction Register

The register where a fetched instruction is placed to be decoded and processed by the Control Unit.

Data Bus

The "cargo lane" of the system bus that transfers actual data between the CPU, memory, and I/O devices.

Address Bus

The part of the system bus that carries memory addresses from the CPU to RAM to locate specific data.

Control Bus

The system bus that sends command signals, such as "Read" or "Write," to coordinate operations between components.

I/O Buffer

A temporary memory array used to hold physical hardware signals, such as keyboard input, until the CPU is ready to retrieve them.