Memory Addressing

How is memory addressing resolved and what are the standard instruction data sizes?

Memory Addressing:
* Memory addresses are always in byte resolution.
* You cannot access less than 1 byte.

Instruction data sizes:
* Byte = 1B
* Half Word (HW) = 2B
* Word (W) = 4B
* Double Word (DW) = 8B

What is the rule for Memory Alignment and how is it calculated?

Memory Alignment:
* An object of size (S bytes) at address (A) is aligned if:
$A \bmod S = 0$

Alignment rules:
* e.g. 4 bytes word can only start at addresses 0, 4, 8, 12...
* Last few digits of an address in binary show what the address number is divisible by.

What are the binary address requirements for different data alignments?

Alignment Binary Requirements:

* Half-word (2 byte) addresses:
* $x \ldots xxxx0$ (address in binary must end in a zero)
* Word (4 bytes) addresses:
* $x \ldots xxx00$ (address in binary must end in two zeros)
* Double-word (8 bytes) addresses:
* $x \ldots xx000$
* Quad-word (16 bytes) addresses:
* $x \ldots x0000$

What is the difference between Little Endian and Big Endian byte ordering?

Little Endian:
* The first byte is stored at the least significant position in the word.
* Example ordering:
* 3 2 1 0 -> "DCBA"

Big Endian:
* The first byte is stored at the most significant position in the word.
* Example ordering:
* 0 1 2 3 -> "AB