EET2210 Midterm (Ch 1-4 review)

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Last updated 3:34 PM on 12/7/23
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34 Terms

1
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The decimal system uses base

10

2
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What is the duty cycle of a digital waveform with a pulse width of 10 ms and a period of 90 ms?

11.1%

3
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Convert the binary to decimal: 101010.01  

42.25

4
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Convert the hexadecimal to decimal: 1A

26

5
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The output from an AND gate is HIGH ________

only when all inputs are HIGH

6
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Determine the decimal value of the signed binary number in the sign magnitude form: 10011001

-25

7
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<p><span style="font-family: arial, helvetica, sans-serif">The approximate duty cycle for the digital waveform is</span></p>

The approximate duty cycle for the digital waveform is

20%

8
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<p><span style="font-family: arial, helvetica, sans-serif">Item (1) of the nonideal pulse in Figure 1-2 below represents the waveform</span></p>

Item (1) of the nonideal pulse in Figure 1-2 below represents the waveform

amplitude

9
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What is the frequency of a digital waveform with a pulse width of 10 ms a period of 90 ms? 

11

10
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The output from an OR gate is HIGH ________

when at least one input is HIGH 

11
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<p><span style="font-family: arial, helvetica, sans-serif">Item (3) of the nonideal pulse in Figure 1-2 below represents the waveform ________.&nbsp;</span></p>

Item (3) of the nonideal pulse in Figure 1-2 below represents the waveform ________. 

pulse width

12
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<p><span style="font-family: arial, helvetica, sans-serif">Item (4) of the nonideal pulse in Figure 1-2 below represents the waveform ________.&nbsp;</span></p>

Item (4) of the nonideal pulse in Figure 1-2 below represents the waveform ________. 

fall time

13
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Convert to hexadecimal: 10100110

A6

14
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When data is sent along a single conductor, it is referred to as ________

serial data

15
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<p>The truth table describes a(n)</p>

The truth table describes a(n)

OR gate

16
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Which of the following is an important feature of the sum-of-products form of expressions?

No signal must pass through more than 2 gates (not including inverters).

17
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Which of the following expressions is in the product-of sums form?

  1. AB(CD)

  2. (AB)(CD)

  3. (A+B)(C+D)

  4. AB + CD

(A + B)(C + D)

18
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True or false: the sum-of-product (SOP) is a standard form of a Boolean expression

True

19
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<p><span style="font-family: Open Sans, sans-serif">Which rule of Boolean algebra does the figure illustrate?&nbsp;</span><br></p>

Which rule of Boolean algebra does the figure illustrate? 

A*1=A

20
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<p><span style="font-family: Open Sans, sans-serif">The symbol represents a(n) ________.</span><br></p>

The symbol represents a(n) ________.

NAND gate

21
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<p><span style="font-family: Open Sans, sans-serif">Which of the Karnaugh maps represents the expression, X = AC + BC + B?</span></p>

Which of the Karnaugh maps represents the expression, X = AC + BC + B?

Figure 3

22
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Which statement below best describes a Karnaugh map?

A) Karnaugh maps provide a graphic approach to simplifying Boolean expressions.

B) The Karnaugh map eliminates the need for using NAND and NOR gates.

C) A Karnaugh map can be used to replace Boolean rules.

D) Variable complements can be eliminated by using Karnaugh maps.

A) Karnaugh maps provide a graphic approach to simplifying Boolean expressions.

23
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True or false: the Karnaugh maps provide graphic approaches to simplifying Boolean expressions.

True

24
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True or false: a LOW input to an inverter produces a HIGH output.

True

25
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The term "hex inverter" refers to ________.

six inverters in a single package

26
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<p>The symbol shown in Figure 4-3 is a(n) ________ gate.</p>

The symbol shown in Figure 4-3 is a(n) ________ gate.

OR

27
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<p><span style="font-family: Open Sans, sans-serif">The symbol below represents a(n) ________.</span></p>

The symbol below represents a(n) ________.

OR gate

28
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<p><span style="font-family: Open Sans, sans-serif">The timing diagram below is correct for a 2-input ________ gate.</span></p>

The timing diagram below is correct for a 2-input ________ gate.

OR

29
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<p>The Boolean expression for the symbol in Figure 4-2 is ________.</p>

The Boolean expression for the symbol in Figure 4-2 is ________.

X = ABCD

30
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True or false: the output of a 2-input Exclusive-OR gate is HIGH when the inputs are equal, or identical.

False

31
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What is the primary motivation for using Boolean algebra to simplify logic expressions?

A) It may reduce the number of inputs required.

B) It may make it easier to understand the circuit.

C) It may reduce the number of gates.

D) All of the above are correct.

D) All of the above are correct

32
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<p>According to DeMorgan's theorem, the equation equals ________.</p>

According to DeMorgan's theorem, the equation equals ________.

ABC’ (not C) 

33
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True or false: the output of an AND gate is LOW only when all inputs are LOW.

False

34
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A Karnaugh map ________.

A) provides a means of reducing complex Boolean expressions

B) produces the simplest sum-of-products expression

C) gives an overall picture of how the signals flow through the logic circuit

D) allows any circuit to be implemented with just AND and OR gates

A) provides a means of reducing complex Boolean expressions

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