PCB Design and Fabrication Unit 3: PCB Standards and Design Rules

This set of vocabulary flashcards covers essential PCB design standards, classifications, fabrication types, assembly subclasses, and key design rules such as track width calculations and signal integrity principles based on IPC guidelines.

IPC

The Institute for Printed Circuits, which provides global PCB standards for design, fabrication, and assembly.

EIA

The Electronic Industries Alliance, which promotes the electronics industry as an umbrella organization.

JEDEC

The Joint Electron Device Engineering Council, responsible for semiconductor and package standardization.

IEC

The International Electrotechnical Commission, which sets international electrical and electronic standards.

MIL-STD

Military Standards used for high-reliability military specifications.

ANSI

The American National Standards Institute, which accredits and coordinates U.S. standards.

IEEE

The Institute of Electrical and Electronics Engineers, which provides standards for electronics, power, and communication.

IPC Class 1

General Electronics classification for consumer products with low cost and minimal reliability requirements.

IPC Class 2

Dedicated Service classification for industrial/commercial systems with higher reliability and repairability.

IPC Class 3

High Reliability classification for medical, aerospace, and defense applications with strict testing and maximum reliability requirements.

Producibility Level A

General (Low) complexity design that is easy to manufacture with relaxed tolerances for mass production.

Producibility Level B

Moderate complexity design representing standard practice with a balance of cost and performance.

Producibility Level C

High complexity design requiring tight tolerances, complex features, and high precision.

IPC Fabrication Type 1

A single-sided printed board.

IPC Fabrication Type 2

A double-sided printed board.

IPC Fabrication Type 3

A multilayer printed board without blind or buried vias.

IPC Fabrication Type 4

A multilayer printed board with blind and/or buried vias.

IPC Fabrication Type 5

A multilayer metal-core printed board without blind or buried vias.

IPC Fabrication Type 6

A multilayer metal-core printed board with blind and/or buried vias.

Assembly Subclass A

Through-hole devices (THD) only.

Assembly Subclass B

Surface-mounted devices (SMD) only.

Assembly Subclass C

Mixed THD and SMD (simple).

Assembly Subclass X

Complex THD/SMD with fine pitch and ball grid array (BGA) packages.

Assembly Subclass Y

Complex THD/SMD with ultrafine pitch and chip-scale packaging.

Assembly Subclass Z

Complex THD/SMD with fine pitch and flip-chip packaging.

IPC Land Pattern Density Level A

Most land protrusion; features the largest spacing, easy routing, and low density.

IPC Land Pattern Density Level C

Least land protrusion; features high density, difficult routing, and complex fabrication.

IPC-2221

The generic standard for PCB design requirements, including current carrying capacity and electrical spacing guidelines.

Track Width Formula

$W = \frac{I}{k \cdot (\Delta T)^b \cdot (C_{th})^c}$ where $W$ is the width, $I$ is current, $\Delta T$ is temperature rise, and $k, b, c$ are constants.

External Layer Constant (k)

In track width empirical calculations for external layers, the constant $k$ is $0.024$.

Internal Layer Constant (k)

In track width empirical calculations for internal layers, the constant $k$ is $0.048$.

Electrical Clearance (< 100 V)

According to IPC-2221, the minimum spacing between conductors is typically $0.13\,mm$ ($5\,mils$).

Electrical Clearance (100–500 V)

According to IPC-2221, the minimum spacing between conductors is required to be $0.6\,mm$ ($24\,mils$).

Annular Ring

The copper area around a drilled hole that ensures electrical connection; typically has a minimum of $0.05\,mm$ ($2\,mils$).

Breakout

An error where a hole is not centered in the pad, leading to the pad being partially cut and resulting in a weak connection.

Design Rule Check (DRC)

Automated verification in PCB tools to identify violations of constraints like trace width and spacing before fabrication.

Signal Integrity (SI)

The ability of a signal to propagate without distortion, delay, or noise, maintaining its correct shape, timing, and amplitude.

Crosstalk

Unwanted electromagnetic coupling between adjacent signal traces due to capacitive or inductive interaction.

Ringing

The oscillatory behavior of signals caused by reflections due to impedance mismatch between the source, trace, and load.

High-Speed PCB Design

A design where signal rise/fall time is comparable to trace delay, usually involving frequencies in the MHz–GHz range.

Via Aspect Ratio

The ratio of hole depth to hole diameter; a typical maximum for manufacturability is $10:1$.