Memory Mapped I/O

What is a flip flop?

• Fundamental unit of digital memory

• Registers are rows of flip flops

• Register: small storage very close to CPU for quick access

What are control registers?

• Sets of flip flops whose inputs/outputs connect to other system components

• Mapped directly to specific hardware (unlike normal registers for computation)

• Example: bit 3 of GPIO register might mean "pin is output mode", bit 7 might mean "pin is currently HIGH"

What are the two methods for interacting with control registers?

• Special IO Instructions (dedicated IO commands like x86 IN/OUT)

• Memory Mapped IO (IO registers have addresses in main memory space)

• Some CPUs use a mix of both

What are characteristics of Special IO Instructions?

• IO registers live in separate IO address space (no main memory consumed)

• Separate space typically much smaller than main memory space

• Dedicated IO instructions increase ISA size; instruction bits are precious

• Only specific IO addressing modes available (no pointer arithmetic or array indexing)

• IO instructions bypass cache by design (no cache coherency headaches)

What are characteristics of Memory Mapped IO?

• IO registers sit in reserved regions of main address space (consumes addresses that cannot be used for RAM)

• Any normal load/store instruction works (all addressing modes available for free)

• No new instructions needed (keeps ISA lean)

• Cache complications: IO regions must be marked non-cacheable (use volatile)

What is the typical microcontroller memory layout pattern?

• General-purpose registers at bottom

• I/O registers immediately above

• Internal RAM above that

• Optionally external RAM at top

• Even CPU registers mapped into memory address space (accessible by address and register name)

What is the GPIO three-register pattern?

• Data register (PORTF): value to drive on output pins

• Data direction register (DDRF): per-bit, sets pin as input (0) or output (1)

• Input pins register (PINF): read-only, reflects actual electrical state of pins

• Each bit corresponds to one physical pin (same pattern on every microcontroller)

How are registers accessed in C without hardcoding hex addresses?

• Vendor's io.h header provides #define statements

• Human-readable labels (e.g., DDRF) resolve to correct address for target chip

• Same C source can target different chips by including different header (portability through indirection)

What are the standard C bitwise patterns for register manipulation?

• Set bit: REG |= (1 << n)

• Clear bit: REG &= ~(1 << n)

• Toggle bit: REG ^= (1 << n)

• Test bit: (REG >> n) & 1 or REG & (1 << n)

What is a bit mask used for?

• Operate on multiple bits at once

• Example: REG |= 0b00001100 sets bits 2 and 3

• Compiles to read–modify–write sequence (CPU loads register, modifies bits, writes back)

Why is volatile necessary for MMIO register accesses?

• Without volatile, compiler can cache value in CPU register (missing hardware updates)

• Compiler can eliminate "redundant" writes never read by program

• Compiler can reorder accesses for performance (breaking required hardware sequencing)

• volatile forces every read and write in source to actually be emitted

What is the typical pattern for a raw MMIO pointer?

• volatile uint32_t *reg = (volatile uint32_t *)0x40014000;

• *reg = 0x01 (guaranteed write to hardware)

• uint32_t v = *reg (guaranteed read from hardware)

What are the two situations where volatile must be used?

• Memory-mapped hardware registers

• Variables shared between an ISR and the main code

• Cost is loss of optimisation for that variable (every access goes to memory - intentional)

What goes wrong without volatile in while (*PORT)?

• Compiler can read PORT once, cache it, turn loop into infinite loop

• For hardware register, value can change behind compiler's back (set by hardware or interrupt)

• volatile tells compiler never cache: re-read every time

What are the differences between MMIO and PMIO for Access?

• MMIO: Normal load/store

• PMIO: Special IN / OUT instructions

MMIO vs PMIO: Addressing modes

• MMIO: All available

• PMIO: Port address only

MMIO vs PMIO: Risk of accidental writes

• MMIO: Higher (stray pointer can corrupt I/O)

• PMIO: Lower

MMIO vs PMIO: Cacheable?

• MMIO: No (peripheral state changes outside CPU)

• PMIO: N/A

• Device memory must never be cached (UART receive register would forever read same byte)

MMIO vs PMIO: Used by

• MMIO: AVR, ARM

• PMIO: x86 legacy

What are the four GPIO bit manipulation idioms?

• REG |= (1 << PIN) (set bit, output high)

• REG &= ~(1 << PIN) (clear bit, output low)

• REG ^= (1 << PIN) (toggle)

• if (REG & (1 << PIN)) (test if bit is set)

How do you enable internal pull-up resistor for GPIO inputs?

• Write a 1 to the corresponding PORT bit

• Otherwise unconnected pin floats and reads random voltages

• For inputs: pull-up prevents floating pin behaviour