Instruction Set Architecture

Instruction Set Architecture (ISA)

the part of the computer architecture related to programming, including the native data types, instructions, registers, addressing modes, memory architecture, interrupt and exception handling, and external I/O

Computer Architecture

a set of disciplines that describes the functionality, the organization and the implementation of computer systems; that is, it defines the capabilities of a computer and its programming model in an abstract way, and how the internal organization of the system is designed and implemented to meet the specified capabilities

Programming

a process that leads from an original formulation of a computing problem to executable computer programs

Data Type

a classification identifying one of various types of data, such as real, integer or Boolean, that determines the possible values for that type; the operations that can be done on values of that type; the meaning of the data; and the way values of that type can be stored

Processor Register

a small amount of storage available as part of a digital processor, such as a central processing unit (CPU)

Addressing Mode

an aspect of the instruction set architecture in most central processing unit (CPU) designs

Memory Mode

the interactions of threads through memory and their shared use of the data

Interrupt

a signal to the processor emitted by hardware or software indicating an event that needs immediate attention

Exception Handling

the process of responding to the occurrence, during computation, of exceptions - anomalous or exceptional conditions requiring special processing - often changing the normal flow of program execution

Input/Output (I/O)

the communication between an information processing system (such as a computer) and the outside world, possibly a human or another information processing system

Intel

an American multinational corporation headquartered in Santa Clara, California

Pentium (P5)

Intel's fifth-generation and first superscalar IA-32 microarchitecture

Advanced Micro Devices (AMD)

an American worldwide semiconductor company based in Sunnyvale, California, United States, that develops computer processors and related technologies for business and consumer markets

Athlon

the brand name applied to a series of x86-compatible microprocessors designed and manufactured by Advanced Micro Devices (AMD)

Fred Brooks

a computer architect, software engineer, and computer scientist, best known for managing the development of IBM's System/360 family of computers and the OS/360 software support package, then later writing candidly about the process in his seminal book The Mythical Man-Month

IBM System/360

a mainframe computer system family announced by IBM on April 7, 1964, and delivered between 1965 and 1978

Bytecode (p-code)

a form of instruction set designed for efficient execution by a software interpreter

Smalltalk

an object-oriented, dynamically typed, reflective programming language

Java Virtual Machine (JVM)

an abstract computing machine

Common Language Runtime (CLR)

the virtual-machine component of Microsoft's .NET framework, manages the execution of .NET programs

Just in time compilation (JIR, dynamic translation)

compilation done during execution of a program - at run time - rather than prior to execution

Transmeta Corporation

an American fabless semiconductor company based in Santa Clara, California

Very Long Instruction Word

processor architectures designed to take advantage of instruction level parallelism (ILP)

Complex instruction set computing (CISC)

a CPU design where single instructions can execute several low-level operations (such as a load from memory, an arithmetic operation, and a memory store) or are capable of multi-step operations or addressing modes within single instructions

Reduced instruction set computing (RISC)

a CPU design strategy based on the insight that a simplified instruction set (as opposed to a complex set) provides higher performance when combined with a microprocessor architecture capable of executing those instructions using fewer microprocessor cycles per instruction

Minimal Instruction Set Computer

a processor architecture with a very small number of basic operations and corresponding opcodes

one instruction set computer (OISC)

an abstract machine that uses only one instruction - obviating the need for a machine language opcode

Control Flow

the order in which the individual statements, instructions or function calls of an imperative or a declarative program are executed or evaluated

Flag Field

an integer interpreted as a sequence of boolean bits, each called a "flag"

Status Register

a collection of status flag bits for a processor

Bitwise Operation

operates on one or more bit patterns or binary numerals at the level of their individual bits

Logical Conjunction

the and of a set of operands is true if and only if all of its operands are true

Logical Disjunction

the or of a set of operands is true if and only if one or more of its operands is true

Logical Compliment

an operation that takes a proposition p to another proposition "not p", written ¬p, which is interpreted intuitively as being true when p is false and false when p is true

Branch

an instruction in a computer program that may, when executed by a computer, cause the computer to begin execution of a different instruction sequence

Branch Predication

a strategy in computer architecture design for mitigating the costs usually associated with conditional branches, particularly branches to short sections of code

Indirect Branch

a type of program control instruction present in some machine language instruction sets

Subroutine

a sequence of program instructions that perform a specific task, packaged as a unit

Single instruction, multiple data (SIMD)

a class of parallel computers in Flynn's taxonomy

Test and set

an instruction used to write to a memory location and return its old value as a single atomic (i.e., non-interruptible) operation

Read Modify Write

a class of atomic operations (such as test-and-set, fetch-and-add, and compare-and-swap) that both read a memory location and write a new value into it simultaneously, either with a completely new value or some function of the previous value

atomic, linearizable, indivisible or uninterruptible

it appears to the rest of the system to occur instantaneously

Vector Processor

a central processing unit (CPU) that implements an instruction set containing instructions that operate on one-dimensional arrays of data called vectors

Parallel Computing

a form of computation in which many calculations are carried out simultaneously, operating on the principle that large problems can often be divided into smaller ones, which are then solved concurrently

graphics processor unit (GPU)

a specialized electronic circuit designed to rapidly manipulate and alter memory to accelerate the creation of images in a frame buffer intended for output to a display

Proprietary Hardware

computer hardware whose interface is controlled by the proprietor, often under patent or trade-secret protection

OpenGL

a cross-language, multi-platform application programming interface (API) for rendering 2D and 3D vector graphics

ARB Assembly Language

a low-level shading language, which can be characterized as an assembly language

Compute Unified Device Architecture (CUDA)

a parallel computing platform and programming model created by NVIDIA and implemented by the graphics processing units (GPUs) that they produce

Hardware Abstractions

sets of routines in software that emulate some platform-specific details, giving programs direct access to the hardware resources

Microcode

a layer of hardware-level instructions that implement higher-level machine code instructions or internal state machine sequencing in many digital processing elements

transport triggered architecture (TTA)

a kind of CPU design in which programs directly control the internal transport buses of a processor

Threaded Code

a compiler implementation technique where the generated code has a form that essentially consists entirely of calls to subroutines

Stack Machine

a real or emulated computer that uses a pushdown stack rather than individual machine registers to evaluate each sub-expression in the program

Mainframe Computers

computers used primarily by corporate and governmental organizations for critical applications, bulk data processing such as census, industry and consumer statistics, enterprise resource planning and transaction processing

Byte

a unit of digital information in computing and telecommunications that most commonly consists of eight bits

System Call

how a program requests a service from an operating system's kernel

MOS Technology 6502

an 8-bit microprocessor that was designed by a small team led by Chuck Peddle for MOS Technology

Zilog Z80

an 8-bit microprocessor designed by Zilog and sold from July 1976 onwards

Motorola 68000

is a 16/32-bit CISC microprocessor core designed and marketed by Motorola Semiconductor Products Sector (now Freescale Semiconductor)

Popek and Goldberg virtualization requirements

a set of conditions sufficient for a computer architecture to support system virtualization efficiently

NOP Slide

a sequence of NOP (no-operation) instructions meant to "slide" the CPU's instruction execution flow to its final, desired, destination whenever the program branches to a memory address anywhere on the sled

immunity-aware programming

programming techniques which improve the tolerance of transient errors in the program counter or other modules of a program that would otherwise lead to failure

NOP

an assembly language instruction, sequence of computer programming language statements, or computer protocol command that effectively does nothing at all, in fact it only increments the program counter by the length of the instruction itself

Non-blocking algorithm

failure or suspension of any thread cannot cause failure or suspension of another thread; for some operations, these algorithms provide a useful alternative to traditional blocking implementations

fetch-and-add

a special instruction that atomically modifies the contents of a memory location

load-link/store-conditional (LL/SC)

a pair of instructions used in multithreading to achieve synchronization

compare-and-swap (CAS)

an atomic instruction used in multithreading to achieve synchronization

Programming Paradigm

a fundamental style of computer programming, serving as a way of building the structure and elements of computer programs

register transfer language (RTL)

a kind of intermediate representation (IR) that is very close to assembly language, such as that which is used in a compiler

control unit (CU)

a component of a computer's central processing unit (CPU) that directs operation of the processor. It tells the computer's memory, arithmetic/logic unit and input and output devices how to respond to a program's instructions

Read-only memory (ROM)

a class of storage medium used in computers and other electronic devices. Data stored in this can only be modified slowly, with difficulty, or not at all, so it is mainly used to distribute firmware (software that is very closely tied to specific hardware, and unlikely to need frequent updates)

programmable logic array (PLA)

a kind of programmable logic device used to implement combinational logic circuits. This has a set of programmable AND gate planes, which link to a set of programmable OR gate planes, which can then be conditionally complemented to produce an output

Random-access memory (RAM)

a form of computer data storage. This device allows data items to be read and written in roughly the same amount of time regardless of the order in which data items are accessed

Flash Memory

an electronic non-volatile computer storage medium that can be electrically erased and reprogrammed

Rekursiv

a computer processor designed by David M. Harland in the mid-1980s for Linn Smart Computing in Glasgow, Scotland

Reconfigurable Computing

a computer architecture combining some of the flexibility of software with the high performance of hardware by processing with very flexible high speed computing fabrics like field-programmable gate arrays (FPGAs)

Western Digital Corporation (WDC)

one of the largest computer hard disk drive manufacturers (along with Seagate Technology) in the world

MCP-1600

a multi-chip microprocessor made by Western Digital in the late 1970s through the early 1980s

Emulate

a startup company established in part to commercialize organ-on-a-chip research devices

Interpreter

a computer program that directly executes, i.e. performs, instructions written in a programming or scripting language, without previously compiling them into a machine language program

Instruction Pipeline

a technique used in the design of computers to increase their instruction throughput (the number of instructions that can be executed in a unit of time)

Load/Store Architecture

only allows memory to be accessed by load and store operations, and all values for an operation need to be loaded from memory and be present in registers

Delay Slot

an instruction slot that gets executed without the effects of a preceding instruction

digital signal processor (DSP)

a specialized microprocessor (or a SIP block), with its architecture optimized for the operational needs of digital signal processing

Harvard Architecture

a computer architecture with physically separate storage and signal pathways for instructions and data

multiply-accumulate operation

a common step that computes the product of two numbers and adds that product to an accumulator

Binary Multiplier

an electronic circuit used in digital electronics, such as a computer, to multiply two binary numbers

AVR32

a 32-bit RISC microprocessor architecture produced by Atmel

Minimal Instruction Set Computer (MISC)

a processor architecture with a very small number of basic operations and corresponding opcodes

field-programmable gate array (FPGA)

an integrated circuit designed to be configured by a customer or a designer after manufacturing

multi-core processor

a single computing component with two or more independent actual processing units, which are the units that read and execute program instructions

Executable Compression

any means of compressing an executable file and combining the compressed data with decompression code into a single executable

Kolmogorov complexity

a measure of the computability resources needed to specify the object

accumulator

a register in which intermediate arithmetic and logic results are stored

Microcontroller

a small computer on a single integrated circuit containing a processor core, memory, and programmable input/output peripherals

MSP430

a mixed-signal microcontroller family from Texas Instruments

Power Architecture

a registered trademark for similar RISC instruction sets for microprocessors developed and manufactured by such companies as IBM, Freescale, AppliedMicro, LSI, e2v and Synopsys

Scalable Processor Architecture (SPARC)

a RISC instruction set architecture (ISA) developed by Sun Microsystems and introduced in mid-1987

Microprocessor without Interlocked Pipeline Stages (MIPS)

a reduced instruction set computer (RISC) instruction set (ISA) developed by MIPS Technologies (formerly MIPS Computer Systems, Inc.)