Chapter 10 - Math Instructions

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Last updated 4:40 PM on 4/15/26
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49 Terms

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1) In the representation of negative numbers, the two's complement is obtained by ________ the

one's complement.

1) _______

A) Adding one to

B) Subtracting one from

C) Inverting

D) Adding two to

A

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2) Which of the following is NOT a structure of an arithmetic instruction? 2) _______

A) Two operands and one destination

B) Only an operand

C) Only a destination

D) One operand and one destination

F) B and C

F

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3) Which of the following is NOT a status bit used in arithmetic instructions? 3) _______

A) Overflow (V)

B) Zero (Z)

C) Underflow (U)

D) Carry (C)

C

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4) Status word S:13 contains the ________. 4) _______

A) Most significant word of the 32-bit value of the MUL instruction

B) Un-rounded quotient for DIV instruction

C) Least significant word of the 32-bit value of the MUL instruction

D) None of the above

C

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5) If an MVM source is 48h and its mask is 1Fh, then after the MVM instruction is executed,

________ is stored in the destination.

5) _______

A) 48h

B) 18h

C) 08h

D) 4Fh

C

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6) The OSR instruction is ANDed with the input instruction in an arithmetic rung to ________. 6) _______

A) Make the arithmetic instruction execute faster

B) Force the arithmetic instruction to execute only one time while the input instruction is true

C) Simplify the operation of multiply and divide instructions

D) Reduce the number of mathematical operations

B

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7. In an add (ADD) instruction, both sources can be ______________________________.

registers

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8. MUL is the acronym for the ______________________________ instruction.

multiply

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9. In the ______________________________ instruction, source A can be divided by source B.

DIV

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10. The ______________________________ instruction calculates the sum of source A and source B.

ADD

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11. The ______________________________ instruction calculates the product of source A and source B

MUL

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12. An add (ADD) instruction has ______________________________ operands

2

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13. The ______________________________ in an add (ADD) instruction must be a register.

destination

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14. At least one of the ______________________________ in a multiply instruction must be a register.

operand

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15. The ______________________________ in a subtract instruction must be a register.

destination

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<p>____ 1. Based on the following ADD function block, which of the following statements is false?</p><p></p><p>A. Source A can be either a number or a register.</p><p>B. Source B can be either a number or a register.</p><p>C. Destination can be either a number or a register.</p><p>D. Source A, Source B, and Destination can be registers.</p><p></p>

____ 1. Based on the following ADD function block, which of the following statements is false?

A. Source A can be either a number or a register.

B. Source B can be either a number or a register.

C. Destination can be either a number or a register.

D. Source A, Source B, and Destination can be registers.

C

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<p>____ 2. In the ladder logic diagram displayed, when SW1 is closed, the content of register N7:1 is equal to ____.</p><p>A. 156</p><p>B. 155</p><p>C. 246</p><p>D. 256</p>

____ 2. In the ladder logic diagram displayed, when SW1 is closed, the content of register N7:1 is equal to ____.

A. 156

B. 155

C. 246

D. 256

B

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<p>____ 3. In the ladder logic diagram displayed, when SW1 is closed, the content of register T4:0 is equal to ____.</p><p>A. 200</p><p>B. 195</p><p>C. 150</p><p>D. 145</p><p></p>

____ 3. In the ladder logic diagram displayed, when SW1 is closed, the content of register T4:0 is equal to ____.

A. 200

B. 195

C. 150

D. 145

C

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<p>____ 4. For the following SUB function block, which statement is true?</p><p></p><p>A. Source A and Destination can be numbers.</p><p>B. Source A, Source B, and Destination can be numbers.</p><p>C. Source A, Source B, and Destination can be registers.</p><p>D. None of the above.</p><p></p><p></p>

____ 4. For the following SUB function block, which statement is true?

A. Source A and Destination can be numbers.

B. Source A, Source B, and Destination can be numbers.

C. Source A, Source B, and Destination can be registers.

D. None of the above.

C

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<p>____ 5. In the following ladder logic diagram, when SW1 is closed, the content of N7: 0 is ____.</p><p></p><p>A. 224</p><p>B. 190</p><p>C. 171</p><p>D. 180</p>

____ 5. In the following ladder logic diagram, when SW1 is closed, the content of N7: 0 is ____.

A. 224

B. 190

C. 171

D. 180

C

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____ 6. Which of the following status bits is set when the result of math or move instructions is a negative number?

A. Overflow (OV)

B. Carry (C)

C. Zero (Z)

D. Sign (S)

D

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____ 7. Status word S:13 contains the ____.

A. most significant word of the 32-bit result of a MUL instruction

B. unrounded quotient of the 32-bit result of a DIV instruction

C. least significant word of the 32-bit result of DIV instruction

D. None of the above.

C

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____ 8. Status word S:14 contains the ____.

A. remainder of a 32-bit DIV instruction

B. unrounded quotient of a 32-bit DIV instruction

C. least significant word of a 32-bit result of MUL instruction

D. None of the above.

B

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____ 9. Which of the following instructions is used to multiply the source by the rate value, add an offset to it, then

stores the result in the destination?

A. SWP (Swap data)

B. CPI (Compute)

C. SCP (Scale with Parameters)

D. SCL (Scale Data)

D

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____ 10. The FILL instruction is used to ____.

A. copy data from one register to another register

B. copy a constant value into an address

C. copy a constant value into a group of registers in ascending order

D. None of the above.

C

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____ 11. The NEG instruction ____.

A. moves data from source to destination

B. moves one’s complement of source to destination

C. reverses the sign from positive to negative or vice versa

D. clears source content

C

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____ 12. After the MUL instruction is carried out, ____.

A. overflow status (OV) bit is always cleared

B. sign status (S) bit is always cleared

C. carry status (C) bit is always set

D. carry status (C) bit is always cleared

D

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____ 13. After DIV instruction is carried out, ____.

A. overflow status (OV) bit is always cleared

B. sign status (S) bit is always cleared

C. carry status (C) bit is always cleared

D. carry status (C) bit is always set

C

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____ 14. FRD instruction converts ____.

A. binary to HEX

B. binary to BCD

C. BCD to binary

D. BCD to HEX

C

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____ 15. TOD instruction converts ____.

A. binary to HEX

B. binary to BCD

C. BCD to binary

D. BCD to HEX

B

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<p>____ 16. After the following instruction is carried out, the content of N7:2 would be ____.</p><p></p><p>A. 11</p><p>B. 6</p><p>C. 5</p><p>D. 550</p>

____ 16. After the following instruction is carried out, the content of N7:2 would be ____.

A. 11

B. 6

C. 5

D. 550

C

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____ 17. In a subtract instruction, Sources A and B can be the content of integer registers N7:0 and N7:1, respectively. T/F

T

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____ 18. In a multiply instruction, the result cannot be placed in the integer register N7:2.

F

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____ 19. The destination in the add instruction must not be a register.

F

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____ 20. There are several advanced math instructions that are available in the Allen-Bradley SLC 5/03, SLC 5/04, and

SLC 5/05 processors.

T

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21. In a math instruction, the ______________________________ must be a register.

destination

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22. In the divide instruction, the content of Source ______________________________ is divided by the content

of Source ______________________________.

A,B

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23. In an add (ADD) instruction, both sources can be ______________________________.

registers

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24. The ______________________________ instruction calculates the difference between Source A and Source

B.

SUB

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25. The ______________________________ instruction calculates the quotient that results from dividing Source

A by Source B.

DIV

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26. CPT is the acronym for the ______________________________ instruction.

compute

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27. The ______________________________ instruction calculates the sum of Source A and Source B.

ADD

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28. The ______________________________ instruction calculates the product of Source A and Source B.

MUL

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29. The subtract (SUB) instruction has ______________________________ operands

three

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30. An add (ADD) instruction has ______________________________ operands.

three

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31. The ______________________________ in an add (ADD) instruction must be a register.

destination

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32. At least one of the ______________________________ in a multiply instruction must be a register.

sources

48
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33. The ______________________________ in a subtract instruction must be a register.

destination

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34. In a subtract instruction, Source______________________________ is deducted from Source

______________________________.

B,A