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T
There is a tremendous variety of products, from single-chip microcomputers costing a few dollars to supercomputers costing tens of millions of dollars that can rightly claim the name "computer".
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F
The variety of computer products is exhibited only in cost.
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F
Computer organization refers to attributes of a system visible to the programmer.
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F
Changes in computer technology are finally slowing down.
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T
The textbook for this course is about the structure and function of computers.
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T
The number of bits used to represent various data types is an example of an architectural attribute.
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T
Interfaces between the computer and peripherals is an example of an organizational attribute.
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F
Historically the distinction between architecture and organization has not been an important one.
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T
A particular architecture may span many years and encompass a number of different computer models, its organization changing with changing technology.
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F
A microcomputer architecture and organization relationship is not very close.
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T
Changes in technology not only influence organization but also result in the introduction of more powerful and more complex architectures.
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T
The hierarchical nature of complex systems is essential to both their design and their description.
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T
Both the structure and functioning of a computer are, in essence, simple.
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T
A computer must be able to process, store, move, and control data.
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F
When data are moved over longer distances, to or from a remote device, the process is known as data transport.
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C
Computer technology is changing at a __________ pace.
A. Slow
B. Slow to medium
C. Rapid
D. Non-existent
D
Computer _________ refers to those attributes that have a direct impact on the logical execution of a program.
A. Organization
B. Specifics
C. Design
D. Architecture
A
Architectural attributes include __________ .
A. I/O mechanisms
B. Control signals
C. Interfaces
D. Memory technology used
B
_________ attributes include hardware details transparent to the programmer.
A. Interface
B. Organizational
C. Memory
D. Architectural
A
It is a(n) _________ design issue whether a computer will have a multiply instruction.
A. Architectural
B. Memory
C. Elementary
D. Organizational
D
It is a(n) _________ issue whether the multiply instruction will be implemented by a special multiply unit or by a mechanism that makes repeated use of the add unit of the system.
A. Architectural
B. Memory
C. Mechanical
D. Organizational
B
A __________ system is a set of interrelated subsystems.
A. Secondary
B. Hierarchical
C. Complex
D. Functional
C
An I/O device is referred to as a __________.
A. CPU
B. Control device
C. Peripheral
D. Register
A
When data are moved over longer distances, to or from a remote device, the process is known as __________.
A. Data communications
B. Registering
C. Structuring
D. Data transport
C
The _________ stores data.
A. System bus
B. I/O
C. Main memory
D. Control unit
B
The __________ moves data between the computer and its external environment.
A. Data transport
B. I/O
C. Register
D. CPU interconnection
B
A common example of system interconnection is by means of a __________.
A. Register
B. System bus
C. Data transport
D. Control device
A
A _________ is a mechanism that provides for communication among CPU, main memory, and I/O.
A. System interconnection
B. CPU interconnection
C. Peripheral
D. Processor
D
_________ provide storage internal to the CPU.
A. Control units
B. ALUs
C. Main memory
D. Registers
C
The __________ performs the computer's data processing functions.
A. Register
B. CPU interconnection
C. ALU
D. System bus
F
The world's first general-purpose electronic digital computer was designed and constructed at The Ohio State University.
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T
John Mauchly and John Eckert designed the ENIAC.
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F
The major drawback of the EDVAC was that it had to be programmed manually by setting switches and plugging and unplugging cables.
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T
The IAS is the prototype of all subsequent general-purpose computers.
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T
The IAS operates by repetitively performing an instruction cycle.
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T
Backward compatible means that the programs written for the older machines can be executed on the new machine.
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F
A vacuum tube is a solid-state device made from silicon.
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T
Computers are classified into generations based on the fundamental hardware technology employed.
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F
System software was introduced in the third generation of computers.
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T
A wafer is made of silicon and is broken up into chips which consists of many gates and/or memory cells plus a number of input and output attachment points.
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T
IBM's System/360 was the industry's first planned family of computers.
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T
Intel's 4004 was the first chip to contain all of the components of a CPU on a single chip.
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T
Designers wrestle with the challenge of balancing processor performance with that of main memory and other computer components.
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F
The Intel x86 evolved from RISC design principles and is used in embedded systems.
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F
A common measure of performance for a processor is the rate at which instructions are executed, expressed as billions of instructions per seconds (BIPS).
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C
The _________ was the world's first general-purpose electronic digital computer.
A. UNIVAC
B. MARK IV
C. ENIAC
D. Hollerith's Counting Machine
D
The Electronic Numerical Integrator and Computer project was a response to U.S. needs during _________.
A. The Civil War
B. The French-American War
C. World War I
D. World War II
A
The ENIAC used __________.
A. Vacuum tubes
B. Integrated circuits
C. IAS
D. Transistors
A
The ENIAC is an example of a _________ generation computer.
A. First
B. Second
C. Third
D. Fourth
B
The __________ interprets the instructions in memory and causes them to be executed.
A. Main memory
B. Control unit
C. I/O
D. Arithmetic and logic unit
D
The memory of the IAS consists of 1000 storage locations called __________.
A. Opcodes
B. Wafers
C. VLSIs
D. Words
C
The __________ contains the 8-bit opcode instruction being executed.
A. Memory buffer register
B. Instruction buffer register
C. Instruction register
D. Memory address register
B
During the _________ the opcode of the next instruction is loaded into the IR and the address portion is loaded into the MAR.
A. Execute cycle
B. Fetch cycle
C. Instruction cycle
D. Clock cycle
B
Second generation computers used __________.
A. Integrated circuits
B. Transistors
C. Vacuum tubes
D. Large-scale integration
A
The __________ defines the third generation of computers.
A. Integrated circuit
B. Vacuum tube
C. Transistor
D. VLSI
A
The use of multiple processors on the same chip is referred to as __________ and provides the potential to increase performance without increasing the clock rate.
A. Multicore
B. GPU
C. Data channels
D. MPC
D
With the __________, Intel introduced the use of superscalar techniques that allow multiple instructions to execute in parallel.
A. Core
B. 8080
C. 80486
D. Pentium
B
The __________ measures the ability of a computer to complete a single task.
A. Clock speed
B. Speed metric
C. Execute cycle
D. Cycle time
D
ARM processors are designed to meet the needs of _________.
A. Embedded real-time systems
B. Application platforms
C. Secure applications
D. All of the above
A
One increment, or pulse, of the system clock is referred to as a _________.
A. Clock tick
B. Cycle time
C. Clock rate
D. Cycle speed
T
At a top level, a computer consists of CPU, memory, and I/O components.
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T
The basic function of a computer is to execute programs.
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T
Program execution consists of repeating the process of instruction fetch and instruction execution.
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F
Interrupts do not improve processing efficiency.
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F
An I/O module cannot exchange data directly with the processor.
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F
A key characteristic of a bus is that it is not a shared transmission medium.
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T
Computer systems contain a number of different buses that provide pathways between components at various levels of the computer system hierarchy.
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T
In general, the more devices attached to the bus, the greater the bus length and hence the greater the propagation delay.
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F
It is not possible to connect I/O controllers directly onto the system bus.
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T
The method of using the same lines for multiple purposes is known as time multiplexing.
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T
Timing refers to the way in which events are coordinated on the bus.
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F
With asynchronous timing the occurrence of events on the bus is determined by a clock.
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T
Because all devices on a synchronous bus are tied to a fixed clock rate, the system cannot take advantage of advances in device performance.
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F
The unit of transfer at the link layer is a phit and the unit transfer at the physical layer is a flit.
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T
A key requirement for PCIe is high capacity to support the needs of higher data rate I/O devices such as Gigabit Ethernet.
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B
Virtually all contemporary computer designs are based on concepts developed by __________ at the Institute for Advanced Studies, Princeton.
A. John Maulchy
B. John von Neumann
C. Herman Hollerith
D. John Eckert
D
The von Neumann architecture is based on which concept?
A. Data and instructions are stored in a single read-write memory
B. The contents of this memory are addressable by location
C. Execution occurs in a sequential fashion
D. All of the above
A
A sequence of codes or instructions is called __________.
A. Software
B. Memory
C. An interconnect
D. A register
C
The processing required for a single instruction is called a(n) __________ cycle.
A. Execute
B. Fetch
C. Instruction
D. Packet
B
A(n) _________ is generated by a failure such as power failure or memory parity error.
A. I/O interrupt
B. Hardware failure interrupt
C. Timer interrupt
D. Program interrupt
C
A(n) _________ is generated by some condition that occurs as a result of an instruction execution.
A. Timer interrupt
B. I/O interrupt
C. Program interrupt
D. Hardware failure interrupt
D
The interconnection structure must support which transfer?
A. Memory to processor
B. Processor to memory
C. I/O to or from memory
D. All of the above
A
A bus that connects major computer components (processor, memory, I/O) is called a __________.
A. System bus
B. Address bus
C. Data bus
D. Control bus
D
The __________ are used to designate the source or destination of the data on the data bus.
A. System lines
B. Data lines
C. Control lines
D. Address lines
C
The data lines provide a path for moving data among system modules and are collectively called the _________.
A. Control bus
B. Address bus
C. Data bus
D. System bus
B
A __________ is the high-level set of rules for exchanging packets of data between devices.
A. Bus
B. Protocol
C. Packet
D. QPI
A
Each data path consists of a pair of wires (referred to as a __________) that transmits data one bit at a time.
A. Lane
B. Path
C. Line
D. Bus
A
The _________ receives read and write requests from the software above the TL and creates request packets for transmission to a destination via the link layer.
A. Transaction layer
B. Root layer
C. Configuration layer
D. Transport layer
D
The TL supports which of the following address spaces?
A. Memory
B. I/O
C. Message
D. All of the above
C
The QPI _________ layer is used to determine the course that a packet will traverse across the available system interconnects.
A. Link
B. Protocol
C. Routing
D. Physical
T
No single technology is optimal in satisfying the memory requirements for a computer system.
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T
A typical computer system is equipped with a hierarchy of memory subsystems, some internal to the system and some external.
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F
External memory is often equated with main memory.
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T
The processor requires its own local memory.
(T/F)
F
Cache is not a form of internal memory.
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F
The unit of transfer must equal a word or an addressable unit.
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T
Both sequential access and direct access involve a shared read-write mechanism.
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T
In a volatile memory, information decays naturally or is lost when electrical power is switched off.
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T
To achieve greatest performance the memory must be able to keep up with the processor.
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F
Secondary memory is used to store program and data files and is usually visible to the programmer only in terms of individual bytes or words.
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