AR101 PRELIM

Module 1-3

What refers to the system attributes that are directly visible to a programmer and directly impact program execution logic?

Computer Architecture

The operational hardware units and their interconnections that realize architectural specifications

Computer Organization

introduced in 1970, demonstrated the principle of long-term compatibility because customers could upgrade to newer hardware without rewriting existing software.

IBM System/370

In microcomputers, such as the, architecture and organization are tightly linked, where technological changes directly drive architectural evolution like RISC

Altair 8800

What does RISC stand for in modern computer architecture?

Reduced Instruction Set Computer

What system design approach begins at the highest system level and breaks it down into lower subsystems?

Top-Down Approach

The specific manner in which functional components are interrelated

Structure

The standalone operation of each individual component within the overall structure

Function

Which of the four basic computer functions computes or transforms data using arithmetic and logical methods?

Data Processing

Input/Output (I/O) operations and long-distance communication across network interfaces fall under which basic function?

Data Movement

What manages system resources and coordinates functional operations in response to executed instructions?

Control Mechanism / Control Unit

Which major top-level component controls overall computer operation and performs primary data processing routines?

Central Processing Unit (CPU)

To temporarily hold data and active program instructions.

primary role of Main Memory

Communication pathways that connect the CPU, main memory, and I/O devices are referred to as:

System Interconnection (System Bus)

Which component inside the CPU performs mathematical computations and logical evaluations?

Arithmetic and Logic Unit (ALU)

High-speed internal memory locations used for temporary storage inside the CPU.

Registers

serve to Link the Control Unit, ALU, and registers together

Internal buses within the CPU

What component of the Control Unit receives and holds instructions fetched from memory?

Instruction Register (IR)

The Control Unit micro-structure includes sequencing logic, control decoders, and control memory to execute

Microinstructions

 

According to the hierarchical model, which level sits directly below Instruction Set Architecture (ISA) on the hardware side?

Microarchitecture

What fundamental hardware technology characterized the first generation of computers (1946–1957)?

Vacuum Tubes

Which of the following computers is recognized as the first general-purpose electronic computer, built at the University of Pennsylvania?

ENIAC

Who built the ENIAC at the University of Pennsylvania?

John Mauchly and John Eckert

introduced by the Von Neumann machine entail storing instructions in memory alongside data

"stored-program concept"

Which of the following is NOT one of the core structures of the Von Neumann machine architecture?

Graphics Processing Unit (GPU)

The second generation of computers (1958–1964) replaced vacuum tubes with which invention developed at Bell Labs in 1947?

Transistors

Transistors are solid-state devices primarily made from which material?

Silicon

What was the typical operating speed of second-generation computers using transistors?

200,000 operations per second

The third generation of computers (1965–1971) shifted from discrete components to which technology?

Integrated Circuits (ICs)

What does Moore's Law state regarding the growth of transistors on integrated circuits?

Transistors double roughly every two years

In the context of computer architecture generations, which technology defines the 6th generation (1991–present)?

Ultra-large-scale integration

What technique overlaps instruction execution stages like a factory assembly line to keep the processor busy?

Pipelining

To guess and prefetch upcoming paths in the instruction code in modern CPU architecture

Branch Prediction

What phenomenon describes the performance mismatch where processor speeds have vastly outpaced main memory (DRAM) transfer speeds?

The Memory Wall

Which level of the memory hierarchy is the smallest, fastest, and closest to the CPU core?

L1 Cache

What is a primary challenge caused by excessive heat dissipation (Watts/cm²) on high-speed chips?

Power Density

What does "RC Delay" refer to in microscopic microchip wiring as components shrink?

Resistance-capacitance bottlenecks

Around what year did the computer industry experience a shift toward the Multi-Core Era as single-core clock speeds plateaued?

2005

Which architectural solution is used to mitigate the "Memory Wall" problem?

Multi-level cache structures embedded close to the CPU

What operational speed characterizes the 6th generation of computers (Ultra-large-scale integration)?

Greater than 1,000,000,000 operations per second

Who is credited with developing the foundational design principles upon which virtually all modern computer systems are based?

John von Neumann

Which of the following is NOT one of the three key concepts of the von Neumann architecture?

Distributed Network Processing

Data and instructions are stored in a single read-write memory.

Unified Memory

What is the physical form of programming achieved by connecting various hardware components into a desired configuration called?

Hardwired programming

What are the two core sub-phases that make up the continuous instruction cycle of a processor?

Fetch cycle and Execute cycle

During which phase of the instruction cycle does the processor read instructions from memory one at a time?

Fetch cycle

Under which of the following conditions will a program's execution NOT halt?

The program finishes loading data into the instruction register.

Which dedicated CPU register holds the memory address of the next instruction to be fetched?

Program Counter (PC)

What action does the processor automatically take after each instruction fetch in sequential execution?

It increments the Program Counter (PC).

Which processor operation is responsible for altering the instruction execution sequence, such as jumping to a new memory address?

Control operation

In the context of a hypothetical machine, what is the temporary storage register used to hold data being processed called?

Accumulator (AC)

What is the primary purpose of introducing interrupts into a computer system?

To drastically improve processing efficiency and avoid wasted idle time

An arithmetic overflow or a division by zero is an example of which class of interrupt?

Program-Generated

Which class of interrupt allows the operating system to perform regular, routine functions at set intervals?

Timer-Generated

Power failures or memory parity errors are classified under which type of interrupt?

Hardware Failure

What are the three chronological sections that make up a standard I/O program?

Preparation Phase, I/O Execution Phase, Completion Phase

What mechanism allows the processor to immediately return control to a user program after setting up a command, rather than waiting or repeatedly polling the device?

Interrupt-Driven I/O

When a pending interrupt is recognized, what does the processor do with the current contents of the Program Counter (PC)?

It saves them as part of context saving before redirection.

How does a user program typically view or perceive the occurrence of an interrupt?

As a transparent interruption requiring no special custom code in the user program

What technology enables direct data exchanges between I/O modules and memory without requiring continuous processor intervention?

Direct Memory Access (DMA)