Binary16 Accumulation

FP16 Accumulation

Repeated floating-point addition in which the current FP16 running sum is added to a new FP16 input and the resulting FP16 value becomes the next stored sum.

Sum + X

What calculation does FP16Accumulator perform whenever it is enabled?

Positive zero

To what FP16 value does the Proteus accumulator initialize its running sum on reset?

The previous Sum and its status flags are retained.

What happens to FP16Accumulator when enable = 0?

Each accumulated addition produces an FP16 result before that result becomes the input to the next accumulation step.

Where can repeated rounding enter an ordinary FP16 accumulation sequence?

Repeated FP16 Rounding

The repeated loss of precision that can occur when every intermediate accumulation result is rounded back to FP16 before the next value is added.

A wider accumulator retains more intermediate precision and range before the running result is reduced to a narrower format.

Why can wider floating-point accumulation improve numerical accuracy?

FP32 Wide Accumulation

The Proteus accumulation mode that converts each FP16 input to FP32 and maintains the running sum as a 32-bit floating-point value.

FP16 input, FP32 running sum

What precision relationship is used by the Proteus wide accumulator?

32 bits

How wide is the result produced by the Proteus wide-accumulation path?

ResultIsFP32 = 1

How does FP16ArithmeticEngine indicate that its selected result is the FP32 wide-accumulator output rather than an ordinary FP16 result?

Non-Fused FP16 Multiply-Accumulate

A MAC implementation in which the multiplication is completed and rounded to FP16 before that FP16 product is separately added to the accumulator.

Sum ← Sum + (OperandA × OperandB)

What running calculation does FP16MultiplyAccumulate perform?

The multiplication stage is rounded to FP16 before its result enters the addition stage.

What makes the Proteus FP16 MAC non-fused?

A fused MAC/FMA retains the unrounded product through the addition and performs one final rounding, whereas the Proteus non-fused MAC rounds the multiplication before the addition.

What is the numerical distinction between a fused multiply-add and Proteus's non-fused FP16 MAC?

Two rounding opportunities.

For an ordinary finite Proteus non-fused MAC update, how many separate arithmetic stages can introduce FP16 rounding?

The separately rounded intermediate product can differ from the exact product used by a fused implementation, so the final accumulated result can also differ.

Why can a non-fused MAC and a fused multiply-add produce different FP16 results from the same operands?

MAC Exception Combination

The Proteus policy in which an exception raised by either the multiplication stage or the following addition stage belongs to the complete MAC operation.

Logical OR

How are corresponding multiplication-stage and addition-stage exception flags combined by FP16MultiplyAccumulate?

Either stage may be responsible for an exceptional or inexact result, so discarding one stage's status would lose information about the complete MAC operation.

Why must a non-fused MAC combine status from both arithmetic stages?

Selected-Operation Status

The exception outputs presented by FP16ArithmeticEngine are those belonging to the operation currently selected by the operation code.

Result[15:0]

Where does the complete arithmetic engine place an ordinary FP16 arithmetic result?

Zero

What does the engine place in Result[31:16] for ordinary FP16 arithmetic operations?

Result[0]=Lesser, Result[1]=Equal, Result[2]=Greater, Result[3]=Unordered

How does FP16ArithmeticEngine encode comparison outcomes into its general Result bus?

IterativeBusy

The engine-level signal formed from the busy conditions of the sequential multiplier, divider, and square-root units.

Logical OR of the three iterative DONE signals.

How does the arithmetic engine form IterativeDone?

Only one iterative operation may begin at a time.

What global rule does FP16ArithmeticEngine impose on sequential multiplication, division, and square root?

UnitStartPulse

Which engine control pulse is used to launch iterative FP16 operations such as sequential multiplication, division, and square root?

UnitEnablePulse

Which engine control pulse updates stateful operations such as FP16 accumulation, wide accumulation, and MAC?

Complete FP16 Arithmetic Engine

The integration layer that selects among FP16 add/subtract, comparison, combinational and sequential multiplication, accumulation, wide accumulation, MAC, division, and square root while routing the appropriate result and IEEE-754 status.