Computer Organization: Number Representation, Instruction Formats, Addressing Modes, and MIPS32 Architecture

Comprehensive practice flashcards in fill-in-the-blank style covering binary/hexadecimal representations, signed number arithmetic (1's and 2's complement), instruction formats, addressing modes, CISC vs. RISC comparative study, and MIPS32 architecture conventions from Lectures 6 through 11.

An $n$-bit unsigned binary number can have $2^n$ distinct combinations, representing decimal numbers in the range from $0$ to __________.

$$2^n - 1$$

When converting the fractional part of a decimal number to binary, one repeatedly multiplies by $2$ and arranges the accumulated integer parts in the __________ they are obtained.

order

In the hexadecimal number system, each hexadecimal digit represents a group of __________ binary digits.

$$4$$

In sign-magnitude representation of an $n$-bit number, the most significant bit indicates sign, while the remaining __________ bits represent the magnitude.

$$n - 1$$

The range of numbers that can be represented in sign-magnitude format using $n$ bits is from $-(2^{n-1} - 1)$ to __________.

$$+(2^{n-1} - 1)$$

A known drawback of both sign-magnitude and 1's complement representations is having two representations for zero, where in 1's complement $-0$ is represented by the bit pattern __________.

$$111\dots1$$

In 2's complement representation using $n$ bits, the minimum representable value is __________.

$$-2^{n-1}$$

In an $n$-bit 2's complement weighted number representation, the most significant bit ($b_{n-1}$) has a weight of __________.

$$-2^{n-1}$$

In 2's complement representation, shifting a number left by $k$ positions with zero padding multiplies the number by __________.

$$2^k$$

In 2's complement representation, shifting right by $k$ positions with __________ bit padding divides the number by $2^k$.

sign

Copying the sign bit as many times as required to extend the size of a 2's complement number is called __________.

sign extension

An instruction consists of two parts: the Operation Code (Opcode) and the __________.

operand(s)

In __________ addressing, the operand is part of the instruction itself, requiring no memory reference.

immediate

In __________ addressing, the instruction contains a field that holds the memory address of the operand, requiring exactly one memory access.

direct

In indirect addressing, __________ memory accesses are required to retrieve the operand value.

$$2$$

In the diagram shown below, the offset is added to the program counter (PC) via an adder to produce the effective memory address, representing __________ addressing.

[figure: https://assets.knowt.com/pdf-flow-prod/8c5d6262-ec0d-40f5-bde9-0674bdc3cab2-figures/10.png]

relative

In relative addressing, if a 12-bit offset is specified, it can take values ranging from $-2048$ to __________.

$$+2047$$

In the diagram shown below, the contents of a register from the register bank are added to an offset to compute the operand address, representing __________ addressing.

[figure: https://assets.knowt.com/pdf-flow-prod/8c5d6262-ec0d-40f5-bde9-0674bdc3cab2-figures/11.png]

indexed

The autoincrement and autodecrement addressing modes were first introduced in the __________ computer system.

PDP-11

Reduced Instruction Set Computer (RISC) architectures are also known as __________ architectures because only LOAD and STORE instructions access memory.

load-store

The only CISC instruction set that survived over generations and remains ubiquitous in modern desktop PCs and laptops is __________.

Intel x86

The diagram shown below illustrates the register organization of the __________ processor family.

[figure: https://assets.knowt.com/pdf-flow-prod/8c5d6262-ec0d-40f5-bde9-0674bdc3cab2-figures/15.png]

Pentium

In a 1991 comparative study between the VAX 8700 and MIPS M2000, the Cycles Per Instruction (CPI) for VAX was about __________ times larger than that of MIPS.

$$6$$

Following the performance limitations of CISC architectures, the VAX processor was replaced by Digital Equipment Corporation (DEC) with the __________ RISC processor.

ALPHA

The MIPS32 ISA defines __________ general-purpose registers (GPRs), each of which is 32 bits wide.

$$32$$

In MIPS32, general-purpose register __________ is hard-wired to the constant value zero.

$$R0$$

In MIPS32, general-purpose register __________ is designated to store the return address whenever a function call is executed.

$$R31$$

During an integer division in MIPS32, the quotient is placed into the LO register and the remainder is placed into the __________ register.

HI

In MIPS32 assembly register naming conventions, register $R1$ is known as __________ and is reserved for the assembler.

$at

In MIPS32 conventions, registers $R4$ through $R7$ are named $a0 through __________ and are used to pass arguments to functions.

$a3

Registers preserved across function calls in MIPS32 assembly are designated as $s0 through __________ ($R16$ through $R23$).

$s7

In MIPS32, memory alignment requires all words to begin at an address that is a multiple of 4, meaning the last two bits of the address must be __________.

00

In MIPS architecture, Coprocessor 0 (CP0) handles the virtual memory system and exceptions, and is formally called the __________ Coprocessor.

System Control

In MIPS32, the pseudo-instruction blt $s1, $s2, Label is translated into slt $at, $s1, $s2 followed by __________.

bne $at, $zero, Label

To load a 32-bit constant into a register, the assembler typically uses the lui instruction followed by the __________ instruction.

ori

In the 32-bit MIPS R-type instruction format, the 5-bit field that specifies the shift amount is named __________.

shamt

In the MIPS32 J-type instruction format, the jump address field is __________ bits wide.

$$26$$

In SPIM system calls, the service code placed in register $v0 to print a string is __________.

$$4$$

In SPIM system calls, loading code 10 into register $v0 and invoking syscall performs the __________ service.

exit

The MIPS assembler directive that allocates memory for an ASCII string and automatically appends a null terminator is __________.

.asciiz