ECE 3620 Master Deck (Connecting things together)

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Last updated 9:23 PM on 10/17/26
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8 Terms

1
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ALU + flags connection?

S suffix updates flags

2
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Little-endian + LDR connection?

LDR reads LSB first

3
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Two's complement + V flag connection?

V=1 when signed overflow occurs

4
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Memory map + addressing modes connection?

Address determines which region (Flash/SRAM/IO)

5
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Von Neumann/Harvard + Cortex-M buses?

Modified Harvard

6
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RISC load-store + LDR/STR connection?

Must load/store before math

7
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PC + instruction encoding connection?

PC advances by 2 or 4

8
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Combinational/sequential + registers?

Registers = flip-flops (sequential)