1/36
Looks like no tags are added yet.
Name | Mastery | Learn | Test | Matching | Spaced | Call with Kai | Chat |
|---|
No analytics yet
Send a link to your students to track their progress
Fetch
Decode
Execute
CPUs are designed to understand a fixed number of instructions. These instructions:
Register
To speed up the processor operations, the processor includes some internal memory storage locations.
Assembly Language
Uses mnemonic (memorable) code words to describe an instruction.
Process Operations
Mostly involve processing data. This data can be stored in memory and accessed from thereon. They are essential for executing algorithms and performing various tasks within the CPU.
General registers
Control registers
Segment registers
There are ten 32-bit and six 16-bit processor registers in IA-32 architecture. The registers are grouped into three categories.
Data registers
Pointer registers
Index registers
The general registers are further divided into the following groups.
Data registers
Four 32-bit data registers are used for arithmetic, logical, and other operations.
AX is the primary accumulator
BX is known as the base register
CX is known as the count register
DX is known as the data register
Some of these data registers have specific use in arithmetical operations.
AX is the primary accumulator
It is used in input/output and most arithmetic instructions. For example, in multiplication operation, one operand is stored in EAX or AX or AL register according to the size of the operand.
BX is known as the base register
It could be used in indexed addressing.
CX is known as the count register
The ECX, CX registers store the loop count in iterative operations.
DX is known as the data register
It is also used in input/output operations. It is also used with AX register along with DX for multiply and divide operations involving large values.
Pointer Register
Are 32-bit EIP, ESP, and EBP registers and corresponding 16-bit right portions IP, SP, and BP.
Instruction Pointer (IP)
Stack Pointer (SP)
Base Pointer (BP)
There are three categories of pointer registers.
Instruction Pointer (IP)
The 16-bit IP register stores the offset address of the next instruction to be executed. IP in association with the CS register (as CS:IP) gives the complete address of the current instruction in the code segment.
Stack Pointer (SP)
The 16-bit SP register provides the offset value within the program stack. SP in association with the SS register (SS:SP) refers to be current position of data or address within the program stack.
Base Pointer (BP)
The 16-bit BP register mainly helps in referencing the parameter variables passed to a subroutine. The address in SS register is combined with the offset in BP to get the location of the parameter. BP can also be combined with DI and SI as base register for special addressing.
Index Registers
The 32-bit index registers, ESI and EDI, and their 16-bit rightmost portions. SI and DI, are used for indexed addressing and sometimes used in addition and subtraction.
Source Index (SI)
Destination Index (DI)
There are two sets of index pointers.
Source Index (SI)
It is used as source index for string operations.
Destination Index (DI)
It is used as destination index for string operations.
Control Register
The 32-bit instruction pointer register and the 32-bit flags register combined
Overflow Flag (OF)
Direction Flag (DF)
Interrupt Flag (IF)
Trap Flag (TF)
Sign Flag (SF)
Zero Flag (ZF)
Auxiliary Carry Flag (AF)
Parity Flag (PF)
Carry Flag (CF)
Many instructions involve comparisons and mathematical calculations and change the status of the flags and some other conditional instructions test the value of these status flags to take the control flow to other location. The common flag bits are:
Overflow Flag (OF)
It indicates the overflow of a high-order bit (leftmost bit) of data after a signed arithmetic operation.
Direction Flag (DF)
It determines left or right direction for moving or comparing string data. When the DF value is 0, the string operation takes left-to-right direction and when the value is set to 1, the string operation takes right-to-left direction.
Interrupt Flag (IF)
It determines whether the external interrupts like keyboard entry, etc., are to be ignored or processed. It disables the external interrupt when the value is 0 and enables interrupts when set to 1.
Trap Flag (TF)
It allows setting the operation of the processor in single-step mode. The DEBUG program we used sets the trap flag, so we could step through the execution one instruction at a time.
Sign Flag (SF)
It shows the sign of the result of an arithmetic operation. This flag is set according to the sign of a data item following the arithmetic operation. The sign is indicated by the high-order of leftmost bit. A positive result clears the value of SF to 0 and negative result sets it to 1.
Zero Flag (ZF)
It indicates the result of an arithmetic or comparison operation. A nonzero result clears the zero flag to 0, and a zero result sets it to 1.
Auxiliary Carry Flag (AF)
It contains the carry from bit 3 to bit 4 following an arithmetic operation; used for specialized arithmetic. The AF is set when a 1-byte arithmetic operation causes a carry from bit 3 into bit 4.
Parity Flag (PF)
It indicates the total number of 1-bits in the result obtained from an arithmetic operation. An even number of 1-bits clears the parity flag to 0 and an odd number of 1-bits sets the parity flag to 1.
Carry Flag (CF)
It contains the carry of 0 or 1 from a high-order bit (leftmost) after an arithmetic operation. It also stores the contents of last bit of a shift or rotate operation.
Segments
Are specific areas defined in a program for containing data, code and stack.
Code Segment
Data Segment
Stack Segment
There are three main segments.
Code Segment
It contains all the instructions to be executed. A 16-bit Code Segment register or CS register stores the starting address of the code segment.
Data Segment
It contains data, constants and work areas. A 16-bit Data Segment register or DS register stores the starting address of the data segment.
Stack Segment
It contains data and return addresses of procedures or subroutines. It is implemented as a 'stack' data structure. The Stack Segment register or SS register stores the starting address of the stack.