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Comprehensive vocabulary flashcards covering computer system overview, operating system architecture, multiprogramming, memory management, and process control from Chapters 1, 2, and 3 of Operating Systems: Internals and Design Principles (9th Edition) by William Stallings.
Processor (Central Processing Unit)
The component that controls the operation of the computer and performs its data processing functions.
Main Memory
Volatile primary memory (also called real memory) used to store programs and data; its contents are lost when the computer is shut down.
I/O Modules
Components that move data between the computer and its external environment, including secondary memory devices, communications equipment, and terminals.
System Bus
A shared communication facility providing data paths and signaling among processors, main memory, and I/O modules.
Microprocessor
A processor implemented on a single chip; the invention that brought about desktop and handheld computing.
Graphical Processing Unit (GPU)
A specialized processor designed to provide efficient computation on arrays of data using Single-Instruction Multiple Data (SIMD) techniques.
Digital Signal Processor (DSP)
A computational device designed to deal with streaming signals such as audio or video, codecs, encryption, and security.
System on a Chip (SoC)
A hardware platform that integrates CPUs, caches, DSPs, GPUs, I/O devices (such as codecs and radios), and main memory all on the same chip.
Program Counter (PC)
A processor register that holds the memory address of the next instruction to be fetched; it is typically incremented after each fetch.
Instruction Register (IR)
A processor register into which a fetched instruction is loaded so that the processor can decode and execute it.
Interrupt
A mechanism by which other modules (such as I/O or timers) may interrupt the normal sequencing of the processor to improve processor utilization.
Program Interrupt
An interrupt generated by a condition resulting from instruction execution, such as arithmetic overflow, division by zero, executing an illegal machine instruction, or referencing disallowed memory.
Timer Interrupt
An interrupt generated by an internal processor timer that allows the operating system to perform scheduling and management functions on a regular basis.
Memory Hierarchy
A tiered organizational structure of memory where descending levels exhibit decreasing cost per bit, increasing capacity, increasing access time, and decreasing frequency of processor access.

Principle of Locality
The principle that memory references made by the processor tend to cluster over time, enabling multilevel hierarchical caching.
Secondary Memory
External, nonvolatile auxiliary memory used to store program and data files (e.g., magnetic disks).
Cache Memory
A small, fast memory buffer invisible to the operating system that exploits the principle of locality to reduce the memory access bottleneck.
Block Size
The unit of data exchanged between cache and main memory.
Least Recently Used (LRU) Algorithm
A cache replacement algorithm that replaces the block that has resided in the cache the longest with no references made to it.
Programmed I/O
An I/O technique where the processor directly controls I/O by periodically polling the status register of an I/O module until the operation finishes, which severely degrades system performance.
Interrupt-Driven I/O
An I/O technique where the processor issues a command to an I/O module and continues useful processing until alerted by an interrupt from the module to perform data transfer.
Direct Memory Access (DMA)
An I/O technique in which a dedicated module transfers an entire block of data directly to or from main memory without involving the processor, except at the start and end of the transfer.
Multicore Computer (Chip Multiprocessor)
A computer system that combines two or more processor cores on a single piece of silicon (die), each core consisting of all the components of an independent processor.
Operating System (OS)
A program that controls the execution of application programs and acts as an interface between applications and the computer hardware, designed for convenience, efficiency, and evolution.
Instruction Set Architecture (ISA)
The hardware-software boundary that defines the machine language instructions that a processor can execute.
Application Binary Interface (ABI)
The interface defining the system call standard to the operating system and hardware resources available via the user ISA for binary program compatibility.
Application Programming Interface (API)
The interface giving programs access to hardware resources and services through high-level language library calls and utilities.
Serial Processing
An early computing mode without an operating system where users accessed the console directly in series using paper sign-up sheets and manual switch setups.
Resident Monitor
The software component of an early batch system that remains permanently in main memory to control job sequencing and execution flow.
Job Control Language (JCL)
A special type of programming language used to provide commands and directives to the monitor, specifying which compiler and data to use.
Uniprogramming
A mode in which the processor executes only one program at a time, pausing and sitting idle whenever an I/O operation must be completed.
Multiprogramming (Multitasking)
A technique where multiple user programs reside concurrently in main memory and the processor switches execution between them when one program is waiting for I/O.
Time-Sharing System
An interactive operating system technique where processor time is shared among multiple concurrent users by interleaving execution in short bursts or quanta.
Compatible Time-Sharing System (CTSS)
One of the first time-sharing systems, developed at MIT by Project MAC in 1961 for the IBM 709, which used time slicing with clock interrupts every 0.2 seconds.
Virtual Memory
A facility that allows programs to address memory from a logical point of view, without regard to the physical amount of main memory available.
Paging
A memory allocation mechanism where processes are divided into fixed-size blocks called pages that are dynamically mapped to physical memory frames.
Microkernel Architecture
An OS architecture that assigns only a few essential functions (address space management, interprocess communication, and basic scheduling) to the kernel, providing modularity and flexibility.
Thread
A dispatchable unit of work within a process that executes sequentially, is interruptible, and has its own processor context and stack data area.
Symmetric Multiprocessing (SMP)
A standalone hardware and operating system architecture where multiple similar processors share main memory and I/O devices, with the OS scheduling processes or threads across all processors.
Distributed Operating System
An operating system that provides the illusion of a single main memory space and single secondary memory space across networked separate systems.
Fault Tolerance
The ability of a system or component to continue normal operation despite the presence of hardware or software faults.
Mean Time to Failure (MTTF)
A measure of reliability representing the average operational duration of a system before a failure occurs.
Mean Time to Repair (MTTR)
The average time it takes to repair or replace a faulty component in a system.
Availability
The fraction of time that a system is operational and accessible to service users' requests.

Permanent Fault
A fault that persists indefinitely once it occurs until the faulty component is repaired or replaced.
Temporary Fault
A fault that is not present continuously under all operating conditions, categorized as transient (occurring only once) or intermittent (occurring at unpredictable times).
Spatial Redundancy
Physical redundancy involving multiple components that either perform the same function simultaneously or serve as active backups in case another fails.
Temporal Redundancy
A fault tolerance method that repeats a function or operation when an error is detected, effective for handling temporary faults.
Information Redundancy
A fault tolerance method that replicates or codes data in such a way that bit errors can be detected and corrected.
Process
A program in execution, an instance of a running program, an entity assigned to execute on a processor, or a unit of activity characterized by a sequential thread of execution, current state, and associated resources.
Process Control Block (PCB)
The primary data structure created and managed by the operating system containing all the state, identification, and control attributes necessary to manage a process.

Trace
The behavior of an individual process characterized by listing the sequence of instructions that execute for that process.
Dispatcher
A small operating system program that switches the processor from one process to another.
Process Spawning
The creation of a new process by the operating system at the explicit request of another running process.
Parent Process
The original, creating process that requests the creation of a new process.
Child Process
The new process created as a result of a spawn request by an existing parent process.
Swapping
The process of moving part or all of a process from main memory to disk into a suspend queue to release memory for ready processes.
Process Image
The complete collection of user program code, user data, execution stack, and process control block attributes allocated to a process.
Program Status Word (PSW)
A register or set of registers containing condition codes and status flags (such as the x86 EFLAGS register) that record processor state information.
User Mode
The less-privileged processor execution mode in which user programs execute and access to privileged instructions and restricted memory is blocked.
System Mode (Kernel Mode)
The more-privileged processor execution mode, also called control mode, used by the OS kernel to execute privileged instructions and access protected memory.
Trap
An error or exception condition generated synchronously within the currently running process (e.g., divide by zero or out-of-bounds access).
Time Slice
The maximum continuous duration of processor time allocated to a process before a clock interrupt forces a preemption.
Process Switch
A full transition of processor execution from one process to another, requiring context saving, PCB updates, queue movements, and context restoration.