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Object Code Generation
Compiler phase where intermediate code (typically three-address code, 3AC) is translated into the machine/assembly language of a specific target architecture. It bridges the gap between abstract, high-level program representation and concrete, executable instructions
Goal: Produce correct, efficient, and minimal assembly that respects hardware constraints, especially the very limited number of registers available on real machines.
How does object code generation avoid redundancy?
Naive translation emits many loads/stores that are never actually needed.
Goals of Object Code Generation
Correctness
Minimal Instructions
Efficient Register Use
Minimize Memory Traffic
Preserve Semantics
Portability(Target Constranints)
Challenges in Object Code Generation
Limited CPU registers
Frequent loads and stores
Selecting efficient instructions
Handling temporaries
Balancing correctness and performance
Target diversity
Target Machine Model
Simple abstract machine for studying code generation
Memory ←→ Register
One of the families of instructions a generator emits
R1 =
4R2