Computer Systems, Architecture, and Data Representation

0.0(0)
Studied by 0 people
call kaiCall Kai
learnLearn
examPractice Test
spaced repetitionSpaced Repetition
heart puzzleMatch
flashcardsFlashcards
GameKnowt Play
Card Sorting

1/36

flashcard set

Earn XP

Description and Tags

Comprehensive vocabulary flashcards covering computer hardware, memory hierarchies, storage technologies, the CPU and Von Neumann architecture, instruction cycles, and data compression techniques based on class notes.

37 Terms

1
New cards

Solid State Drive (SSD)

A secondary storage device using flash memory that consumes less power, enables faster data access, and does not require spin-up time before accessing data compared to magnetic drives.

2
New cards

Solid State Storage

A non-volatile storage method that reads and writes data by controlling the movement of electrons within NAND or NOR gates using millions of microscopic transistors to store binary ones and zeros.

3
New cards

Optical Storage

A storage category where data is stored in spiral tracks; a laser burns microscopic pits and lands/grooves into the disc surface, and a sensor reads the data by capturing reflected laser light to interpret binary values.

4
New cards

Magnetic Storage

A storage medium where data is written onto spinning platters (typically rotating 70007000 times per second) divided into concentric tracks and sectors, using a read/write head that changes electromagnetic fields to store dots of magnetisation.

5
New cards

Latency

The time delay required for the read/write head of a magnetic disk drive to locate a specific block of data on the platter.

6
New cards

Disk Fragmentation

The state that occurs after extensive drive use when files become split and scattered across non-contiguous blocks on a hard disk drive, increasing file access times.

7
New cards

Primary Memory

Computer memory that is accessed directly by the CPU, comprising RAM and ROM.

8
New cards

Secondary Memory

Non-volatile storage that is not directly accessed by the CPU, used for the permanent retention of programs and data, with slower access speeds than primary memory.

9
New cards

RAM (Random Access Memory)

Volatile primary storage, also known as the immediate access store, that allows both reading and writing to hold currently running programs and active data.

10
New cards

ROM (Read-Only Memory)

Non-volatile primary memory that cannot easily be rewritten or altered, used to permanently store firmware and boot-up instructions.

11
New cards

Dynamic RAM (DRAM)

A type of RAM manufactured from transistors and capacitors that hold electric charge representing bits; it has high storage density and low cost but requires continuous electrical refreshing.

12
New cards

Static RAM (SRAM)

A fast, expensive type of RAM constructed using flip-flop circuits that does not need periodic refreshing, typically utilized in cache memory.

13
New cards

Embedded System

A dedicated combination of hardware and software designed to perform a dedicated function inside a larger device (e.g., in washing machines, microwaves, or televisions), characterized by minimal memory, low power draw, and dedicated microprocessors.

14
New cards

System Clock

A CPU component that emits continuous timing signals measured in gigahertz (GHz\text{GHz}) to coordinate and synchronise computer operations.

15
New cards

Overclocking

The procedure of configuring the system clock to run faster than its factory rating, which carries the risk of making processing operations unsynchronized.

16
New cards

Instruction Set

The complete collection of machine-level commands that a specific CPU is designed to directly comprehend and execute.

17
New cards

Opcode (Operation Code)

The segment of a machine-level instruction that designates the specific operation or function to be executed by the CPU.

18
New cards

Operand

The segment of a machine code instruction containing the actual data to be operated upon or the memory address where the data is stored.

19
New cards

CPU Core

An independent execution unit inside a central processor; adding cores allows simultaneous processing of multiple instructions, though performance gains can be offset by inter-core communication overhead.

20
New cards

Bus Width

The number of parallel transmission wires in a system bus, which determines the maximum addressable memory space (address bus) or the volume of bits moved per operation (data bus).

21
New cards

Cache Memory

Extremely fast, small memory located on or near the CPU that holds frequently accessed data and instructions to avoid slower retrievals from main RAM.

22
New cards

Von Neumann Architecture

A foundational computer system design based on the stored-program concept, in which both program instructions and working data reside within the same unified physical memory space.

23
New cards

Control Unit (CU)

The CPU component in charge of directing the execution of instructions by decoding machine code and generating control signals for the rest of the processor.

24
New cards

Arithmetic Logic Unit (ALU)

The core processor circuit that executes all basic arithmetic operations (e.g., addition, subtraction) and logical comparisons.

25
New cards

Program Counter (PC)

A hardware register inside the CPU that holds the memory address of the next instruction waiting to be fetched and executed.

26
New cards

Memory Address Register (MAR)

A register within the CPU that retains the memory address currently being read from or written to via the address bus.

27
New cards

Memory Data Register (MDR)

A CPU register that temporarily holds any data or instruction recently read out from memory, or data queued to be written into a memory address.

28
New cards

Current Instruction Register (CIR)

A CPU register that stores the specific instruction that has just been fetched from memory while it is being decoded and processed.

29
New cards

Accumulator (ACC)

A dedicated internal processor register that temporarily retains the intermediate outcomes of arithmetic and logical computations carried out by the ALU.

30
New cards

Address Bus

A unidirectional communication pathway that carries memory address coordinates from the CPU out to primary memory.

31
New cards

Data Bus

A bidirectional system bus used to transfer actual data values and instructions between the CPU, memory, and peripheral components.

32
New cards

Control Bus

A bidirectional bus that carries command, timing, and status signals between the central processing unit and all other connected computer components.

33
New cards

Fetch-Decode-Execute Cycle

The three-stage cycle through which the CPU retrieves an instruction address from the PC into the MAR, loads data into the MDR and CIR, decodes it with the CU, and executes the operation via the ALU.

34
New cards

File Compression

The technique of reducing the digital storage size of a file by removing redundant or unnecessary data to conserve space, expedite transmission, and reduce bandwidth expenses.

35
New cards

Lossy Compression

A data reduction process that permanently deletes unnoticeable or non-essential information (such as imperceptible audio frequencies or excess image color depth/resolution), preventing complete reconstruction of the original file.

36
New cards

Lossless Compression

A compression technique that reduces file sizes by temporarily encoding data redundancies, ensuring that the decompressed file can be restored exactly to its original form without data loss.

37
New cards

Run-Length Encoding (RLE)

A lossless compression algorithm that identifies consecutive repeating runs of identical data values or pixels and encodes them as the count of repetitions paired with the character or pixel code.