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Vocabulary flashcards covering core digital concepts from the lecture transcript, including counters, shift registers, arithmetic logic circuits, semiconductor memory architectures, serial and parallel communication, PLCs, microcontrollers, and embedded signal processing.
Modulus (Counter)
The total number of unique states that a counter passes through before resetting.
Ripple Counter
An asynchronous counter where each flip-flop is clocked by the output of the preceding stage rather than a common clock signal.
Synchronous Counter
A counter in which all stage clock inputs are connected to a common clock signal simultaneously, reducing propagation delay buildup.
Decade Counter
A counter with a normal decimal count sequence from 0 through 9, requiring 4 flip-flops to represent its ten states.
Down Counter
A counter whose normal action is to decrement its count value by one on each clock pulse.
Cascaded Frequency Dividers
Frequency divider stages connected in series whose overall division ratio equals the product of the individual division ratios of each stage.
TTL 7493
A 4-bit asynchronous binary ripple counter IC that advances on negative (falling) clock edges.
74192
A synchronous up/down decade counter IC featuring active-LOW control inputs and carry/borrow outputs to facilitate cascading.
74HC393
An IC containing dual 4-bit asynchronous binary counters with an active-HIGH master reset that overrides the clock.
74HC193
A synchronous 4-bit up/down binary counter IC with separate CPU (count up) and CPD (count down) clock inputs advancing on positive (rising) edges.
4553
A three-digit BCD counter containing three cascaded decade counters, latches to store count data, and a multiplexer driving three digits.
Slot-Type Optical Interrupter
A sensor formed by an infrared LED emitter and a phototransistor detector separated by a gap, which switches off when an opaque object blocks the light beam.
Tachometer
An instrument designed to measure rotational speed in revolutions per minute (RPM).
Register
A group of flip-flops used to store binary data.
Shift Register
A digital circuit composed of flip-flops characterized by data storage and data movement capability.
Serial Loading
The process of entering data into a register one bit at a time sequentially.
Parallel Loading
The process of loading all data bits into a register simultaneously in a single clock cycle.
Serial-In, Parallel-Out (SIPO) Register
A register that receives data bits serially one at a time and makes all stored stages available simultaneously on parallel outputs.
Parallel-In, Serial-Out (PISO) Register
A register that loads an entire word together across parallel inputs and then transmits its bits sequentially one at a time.
Buffer Register
A register used for the temporary storage of digital data without shifting.
Recirculating Shift Register
A shift register configured by connecting the serial output back to the serial input, preserving the total number of 1s and 0s in the pattern.
74LS194
A 4-bit bidirectional universal shift register that can shift left, shift right, parallel load, or hold states based on control inputs S0 and S1.
74HC164
An 8-bit serial-in, parallel-out (SIPO) shift register whose two serial data inputs are combined internally through an AND gate.
Ring Counter
A circular shift register created by connecting the output of the last stage back to the input of the first stage, circulating an initial bit pattern.
Half Adder
A combinational arithmetic circuit with 2 inputs (A, B) and 2 outputs (Sum=AāB, Carry=Aā B).
Full Adder
An arithmetic circuit that adds three bits (A, B, and Cinā), generating Sum=AāBāCinā and a carry output when two or more inputs are HIGH.
Half Subtractor
A combinational circuit that subtracts one single bit from another (AāB), producing a difference bit (AāB) and a borrow bit when A=0 and B=1.
Full Subtractor
A combinational circuit that subtracts two bits and a borrow-in (AāBāBinā), producing difference and borrow-out outputs.
7483 IC
A 4-bit binary parallel adder integrated circuit with fast carry.
74181
An arithmetic-logic unit (ALU) and function generator integrated circuit.
Repeated-Addition Multiplier
A binary multiplier that adds the multiplicand to an accumulator register repeatedly until a down counter loaded with the multiplier reaches zero.
Add-and-Shift Multiplier
A digital multiplier that tests the LSB of the multiplier register to decide whether to add the multiplicand before shifting partial products.
Two's Complement
A binary number representation formed by taking the one's complement (inverting all bits) and adding 1, allowing subtraction via binary addition.
Signed Overflow
An arithmetic error condition that occurs in two's-complement addition when adding two numbers with the same sign yields a result with the opposite sign.
Volatile Memory
Memory storage that loses its stored data when electrical power is removed without backup.
Nonvolatile Storage
Memory or storage media that retains stored information when electrical power is turned off.
DRAM (Dynamic RAM)
A type of volatile semiconductor memory that requires periodic refresh cycles while operating to retain data.
SRAM (Static RAM)
A volatile memory type that stores data in flip-flop-like cells, requires no refresh cycles while powered, and is commonly used for high-speed cache.
Address Bus
A unidirectional bus that carries binary address codes to select a specific memory location or I/O device.
Data Bus
A bidirectional bus that carries the actual data words being transferred between the processor, memory, and peripheral devices.
Random-Access Memory (RAM)
Read/write semiconductor memory where any storage location can be accessed directly in the same amount of time.
Memory Address
A unique binary code that identifies a specific location within a memory system.
7489 RAM
A 16Ć4-bit bipolar RAM IC with open-collector inverted read outputs requiring pull-up resistors.
2114 SRAM
A 1024Ć4-bit static RAM IC requiring 10 address inputs and utilizing three-state bidirectional data lines.
ROM (Read-Only Memory)
Nonvolatile semiconductor memory whose contents can be read but not modified during normal circuit operation.
Firmware
Software permanently or semi-permanently programmed into nonvolatile memory (such as boot code or BIOS/UEFI).
Fusible-Link PROM
A programmable read-only memory IC that can be programmed only once by the user after manufacturing using blown electrical fuses.
UV EPROM
An erasable programmable read-only memory IC featuring a quartz window through which exposure to ultraviolet light erases the data.
EEPROM
An electrically erasable programmable ROM that can be erased and reprogrammed in-circuit without requiring ultraviolet light.
Flash Memory
High-density nonvolatile semiconductor memory that combines nonvolatility with electrical in-system erasability and reprogramming.
NVSRAM (Nonvolatile SRAM)
A hybrid memory architecture that pairs a volatile SRAM array with an EEPROM shadow array, using store and recall operations to preserve data.
FRAM (Ferroelectric RAM)
A nonvolatile random-access memory technology that uses ferroelectric material to retain data without continuous electrical power.
MRAM (Magnetoresistive RAM)
A nonvolatile random-access memory technology that stores data using magnetic storage elements rather than electric charges.
Write Endurance
The finite number of write and erase cycles an EEPROM or flash cell can undergo before experiencing physical degradation and failure.
DIMM (Dual In-line Memory Module)
A standard memory circuit board with separate electrical contacts on each side of the module for expanding computer RAM.
DDR SDRAM
Double Data Rate Synchronous Dynamic RAM; memory technology that transfers data on both the rising and falling edges of the clock signal.
WORM
An acronym standing for Write Once, Read Many; applies to storage media that can be written to once and read multiple times.
Hybrid Hard Drive
A traditional magnetic hard disk drive integrated with a small flash-memory cache to improve read/write access speeds.
Digital Potentiometer (DS1804)
A solid-state variable resistor that changes resistance using digitally controlled internal electronic switches and saves wiper settings to EEPROM.
Arithmetic-Logic Unit (ALU)
The functional processing section of a computer that carries out arithmetic calculations and logical decisions.
Control Unit
The computer sub-unit that directs processor operation, manages instruction fetching, and orchestrates the execution cycle.
Microprocessor
A central processing unit (CPU) fabricated on a single integrated circuit chip.
Instruction Register
A dedicated register inside the CPU that holds the binary instruction currently being decoded and executed.
Accumulator
A primary CPU register used to temporarily store operands and the intermediate results of ALU operations.
Memory Map
A diagram or listing showing the allocation of system address ranges to specific memory chips and I/O devices.
Serial Data Transmission
The transmission method where binary data bits are sent sequentially one after another over a single communication line or channel.
Parallel Data Transmission
The transmission method where multiple bits are sent simultaneously across multiple parallel wires or channels.
UART (Universal Asynchronous Receiver-Transmitter)
A communications device that converts parallel data bytes into serial bit streams for transmission and reconstructs serial streams back into parallel bytes.
Handshaking
The exchange of predefined hardware or software signals between a sender and receiver to synchronize and coordinate data transfers.
Baud Rate
A measurement of data communication speed representing the number of signal symbol changes per second.
Parity Bit
An additional bit appended to a binary data word to provide simple error detection by making the total count of 1s consistently even or odd.
Cyclic Redundancy Check (CRC)
An error-detecting polynomial code that detects burst errors and multi-bit data corruption far more effectively than simple parity checking.
Full-Duplex Communication
A transmission mode allowing simultaneous two-way data communication between devices in both directions at the same time.
Receive Overrun
A UART error occurring when a newly arrived data byte overwrites the receive buffer before the previous unread byte has been read by the system.
Framing Error
A serial transmission error condition occurring when a UART receiver fails to detect an expected stop bit at the designated time slot.
PLC (Programmable Logic Controller)
A ruggedized industrial computer system designed to control factory machinery and manufacturing processes using input/output modules.
Ladder Logic
A graphical programming language for PLCs modeled closely after electrical relay logic schematic diagrams.
Microcontroller
A 'computer on a chip' integrating a CPU, memory, and programmable input/output peripherals onto a single integrated circuit.
RISC (Reduced Instruction Set Computer)
A microprocessor architecture design emphasizing a smaller set of simplified, highly optimized instructions for faster execution.
PBASIC
A specialized dialect of the BASIC programming language interpreted by onboard firmware on BASIC Stamp microcontroller modules.
Digital Signal Processing (DSP)
The mathematical manipulation and processing of digitized continuous signals to perform filtering, analysis, or transformation.
Multiply-Accumulate (MAC)
A fundamental DSP operation that computes the product of two numbers and adds that product to an ongoing accumulator total.
Pipelining
A processor performance technique of overlapping multiple instruction execution phases (fetch, decode, execute) to increase throughput.
Bayer Color Filter Array
A color filter mosaic placed over photosensors in digital cameras to record alternating red, green, and blue color intensities per pixel.
CdS Photocell
A photoresistor whose electrical resistance decreases nonlinearly as the intensity of incident light increases.