CH04&5-COA10e

Principle of Locality

during the course of execution of a program, memory references by the processor tend to cluster.

Principle of Locality

It is also called the locality of reference

Location

Refers to whether memory is internal and external to the computer

Internal Memory

_____________ is often equated with main memory

registers

Processor requires its own local memory, in the form of ___________

Cache

______ is another form of internal memory

bytes

Memory is typically expressed in terms of ______

unit of transfer

For internal memory the ____________ is equal to the number of electrical lines into and out of the memory module

Location
Capacity
Unit of Transfer

3 Characteristics of Memory Systems

Sequential Access

Access must be made in a specific linear sequence

Direct Access

Individual blocks or records have a unique address based on physical location

Random Access

Any location can be selected at random and directly addressed and accessed

Associative Access

Each location has its own addressing mechanism and retrieval time is constant independent of location or prior access patterns

Sequential
Direct
Random
Associative

4 Methods of Accessing Units of Data

Capacity & Performance

Two most important characteristics of memory

Access time (latency)

•For random-access memory it is the time it takes to perform a read or write operation

•For non-random-access memory it is the time it takes to position the read-write mechanism at the desired location

Memory cycle time

Access time plus any additional time required before second access can commence

Memory cycle time

Additional time may be required for transients to die out on signal lines or to regenerate data if they are read destructively

Memory Cycle Time

Concerned with the system bus, not the processor

Transfer Rate

The rate at which data can be transferred into or out of a memory unit

Semiconductor memory

Magnetic surface memory

Optical

Magneto-optical

Most common forms of memory

Volatile Memory

Information decays naturally or is lost when electrical power is switched off

Nonvolatile memory

Once recorded, information remains without deterioration until deliberately changed

Nonvolatile memory

No electrical power is needed to retain information

Magnetic-surface memories

Are nonvolatile

Semiconductor memory

May be either volatile or nonvolatile

Nonerasable memory

Cannot be altered, except by destroying the storage unit

Nonerasable memory

Semiconductor memory of this type is known as read-only memory (ROM)

Faster ; greater

____ access time, _____ cost per bit

Greater ; smaller

____ capacity, _____ cost per bit

Greater; slower

_______ capacity, ______ access time

secondary memory or auxiliary memory

External, nonvolatile memory is also referred to as ______________ or __________________

Disk cache

A portion of main memory can be used as a buffer to hold data temporarily that is to be read out to disk

Virtual Memory

Facility that allows programs to address memory from a logical point of view, without regard to the amount of main memory physically available

Direct
Associative
Set Associative

Three techniques used in mapping main memory blocks to cache lines

Direct

Maps each block of main memory into only one possible cache line

Associative

Permits each main memory block to be loaded into any line of the cache

Associative

The cache control logic interprets a memory address simply as a Tag and a Word field

Associative

To determine whether a block is in the cache, the cache control logic must simultaneously examine every line’s Tag for a match

Set Associative

A compromise that exhibits the strengths of both the direct and associative approaches while reducing their disadvantages

Victim Cache

Originally proposed as an approach to reduce the conflict misses of direct mapped caches without affecting its fast access time

Least recently used (LRU)

First-in-first-out (FIFO)

Least frequently used (LFU)

most common replacements algorithms

LRU

Replace that block in the set that has been in the cache longest with no reference to it

FIFO

Replace that block in the set that has been in the cache longest

LFU

Replace that block in the set that has experienced the fewest references

Write through

All write operations are made to main memory as well as to the cache

Write through

The main disadvantage of this technique is that it generates substantial memory traffic and may create a bottleneck

Write back

Minimizes memory writes

Write back

Updates are made only in the cache

Write back

Portions of main memory are invalid and hence accesses by I/O modules can be allowed only through the cache

Write back

This makes for complex circuitry and a potential bottleneck

Multilevel Caches

As logic density has increased it has become possible to have a cache on the same chip as the processor

level 1 (L1)

Internal cache designated as ______

level 2 (L2)

External cache designated as ______

• Higher hit rate

• Balances load of instruction and data fetches automatically

• Only one cache needs to be designed and implemented

What are the advantages of unified cache?

• Eliminates cache contention between instruction fetch/decode unit and execution unit

• Important in pipelining

What are the advantages of split cache?

• One dedicated to instructions

• One dedicated to data

• Both exist at the same level, usually as two L1 caches

How are split caches commonly allocated?