Digital Logic Design: Midterm

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100 Terms

1
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SOP expression consists of AND terms joined together by OR

True

2
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POS expression consists of OR terms joined together by AND

True

3
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Two circuits with different gate arrangements can produce the same output for every input combination

True

4
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DeMorgan's theorem states that (AC)' = A'C'

False

5
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Simplifying a Boolean expression can reduce the number of gates and connections required in a circuit

True

6
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When creating an SOP expression from a truth table, an AND term is written for every row where the output is 0

False

7
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For A = 0, B = 1, C = 1, the corresponding AND term is A'BC

True

8
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A 4-variable Karnaugh map contains 16 squares

True

9
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Two K-map cells are adjacent when they differ in exactly one variable

True

10
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The left and right edges of a K-map can be adjacent

True

11
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A K-map group may contain 3 adjacent cells

False

12
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Larger K-map groups generally produce simpler Boolean terms

True

13
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Variables that change within a K-map group are eliminated

True

14
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XOR produces a HIGH output when its two inputs are at the same logic level

False

15
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XNOR is the inverse of XOR

True

16
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AB + A'B' represents XNOR

True

17
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An XNOR gate can determine whether two input bits are equal

True

18
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For an AND enable circuit, setting the control input to 1 allows the other input signal to pass to the output

True

19
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A 74HC86 belongs to the high-speed CMOS family

True

20
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A floating TTL input acts like logic 1

True

21
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Unused CMOS inputs should normally be left floating

False

22
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DIP pin numbering begins near the notch or dot and proceeds counterclockwise when viewed from the top

True

23
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Fault isolation is the process of locating the faulty component or circuit location

True

24
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In-system programming requires the PLD to be removed from its circuit before programming

False

25
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In top-down design, major subsections are defined before individual circuits inside them

True

26
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AB' + C is an SOP expression

True

27
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In ABC + DE', ABC and DE' are the product terms

True

28
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Multiplying out Boolean terms can help reveal common factors and possible cancellations

True

29
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A truth-table row whose output is 0 must be included as a minterm when forming an SOP expression

False

30
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A three-input majority function is HIGH for input combination 111

True

31
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A three-input majority function is HIGH for input combination 100

False

32
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A 2-variable K-map contains eight cells

False

33
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K-map groups are allowed to overlap when doing so helps obtain a simpler expression

True

34
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For a minimum POS form, the zeros of the function are used in the K-map process

True

35
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In a K-map, diagonal cells are automatically adjacent

False

36
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The XOR expression A'B + AB' is HIGH when A and B are different

True

37
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XOR and XNOR can both be HIGH for the same two-input combination

False

38
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A 2-bit equality detector can use one XNOR for each bit pair and an AND gate to combine the comparison results

True

39
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For an OR enable circuit, a control input of 0 allows signal A to pass through

True

40
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For an OR enable circuit, setting the control input to 1 forces the output LOW

False

41
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A chip containing fewer than 12 gates is classified as SSI in the lecture

True

42
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The 74LS prefix identifies the Low-power Schottky TTL family

True

43
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The 74HCT series is both pin-compatible and electrically compatible with TTL

True

44
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A voltage in the indeterminate logic range can be assumed to be a valid logic 0

False

45
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A connection diagram can show pin numbers, component values, signal names, and power-supply voltages

True

46
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An internally open output is guaranteed to remain LOW

False

47
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Two internally shorted input pins can be forced to carry identical signals

True

48
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With circuit power OFF, an ohmmeter can help confirm whether two points are shorted

True

49
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Driving too many inputs from one output can pull the output voltage into the indeterminate range

True

50
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A PLD design can be described using schematic diagrams, logic equations, truth tables, or HDL

True

51
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Which expression is in SOP form?

AB + C'D

52
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What is the main reason for simplifying a Boolean expression?

To reduce gates, wiring, cost, and delay

53
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According to DeMorgan's theorem, (AC)' equals

A' + C'

54
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Which Boolean law states B + B' = 1?

Complement law

55
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For A = 0, B = 1, C = 1, which AND term represents the input combination?

A'BC

56
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A three-input majority circuit produces HIGH when

At least two inputs are HIGH

57
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How many squares are in a 4-variable K-map?

16

58
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Two K-map cells are adjacent when

They differ in exactly one variable

59
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Which is a valid K-map group size?

8

60
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Why are larger K-map groups preferred?

They produce simpler terms

61
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Which variables remain in the Boolean term produced by a K-map group?

Variables that remain constant within the group

62
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When is an XOR output HIGH?

When the inputs are different

63
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Which expression represents XOR?

A'B + AB'

64
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Which expression represents XNOR?

AB + A'B'

65
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Why is XNOR useful in an equality detector?

It outputs 1 when two bits are equal

66
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Which IC is identified in the lecture as a high-speed CMOS quad XOR?

74HC86

67
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For an AND enable circuit, which value of control input B allows A to pass to the output?

1

68
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A chip containing 500 gates belongs to which integration category?

LSI

69
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What identifies the starting end for numbering pins on a DIP package?

The notch or dot

70
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What prefix identifies Low-power Schottky TTL?

74LS

71
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According to the lecture, what does a floating TTL input act like?

Logic 1

72
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What is the primary goal of fault isolation?

Find the exact faulty part or location

73
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Which instrument is appropriate for checking whether a digital signal is present on a single pin?

Logic probe

74
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What is the main advantage of in-system programming of a PLD?

The PLD can be programmed while remaining in its circuit

75
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What should be done if simulation shows an error in a PLD design?

Return to the design, correct the error, and repeat compilation and simulation

76
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Which of the following is a POS expression?

(A + B')(C + D)

77
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In the SOP expression ABC + DE', which are the product terms?

ABC and DE'

78
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Why is it useful to write a circuit's output as a Boolean expression before simplifying it?

It provides an exact logical description that Boolean rules can be applied to

79
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Which input patterns make a 3-input majority function HIGH?

011, 101, 110, 111

80
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What is the simplified majority expression presented in the lecture?

AB + AC + BC

81
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How many cells are in a 2-variable K-map?

4

82
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What is the practical K-map limit described in the lecture?

About 5 or 6 variables

83
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Why may K-map groups overlap?

Repeating coverage does not change the function and can allow larger simplifying groups

84
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For POS simplification, which K-map values are grouped?

The zeros

85
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Which statement about K-map wraparound is correct?

The left and right edges can be adjacent, and the top and bottom edges can be adjacent

86
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Which input combination makes XOR LOW?

A = 1, B = 1

87
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Which input combination makes XNOR HIGH?

A = 0, B = 0

88
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In a 2-bit equality detector, what combines the two XNOR outputs?

An AND gate

89
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For an OR gate used as an enable circuit, which control value allows A to pass?

B = 0

90
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When B = 1 in an OR enable circuit, what happens to the output?

It is forced HIGH

91
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Which integration category covers 12 to 99 gates per chip in the lecture?

MSI

92
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Which package has J-shaped leads that curl under the IC?

PLCC

93
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Which CMOS series is described as high-speed and pin-compatible with TTL?

74HC

94
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Which CMOS series is described as high-speed, pin-compatible, and electrically compatible with TTL?

74HCT

95
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Why should a voltage in the indeterminate range be avoided?

The device may interpret it unpredictably and may draw extra current

96
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Which chip type is identified as Z2 in the lecture's connection-diagram example?

74HC00

97
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What happens to an IC input that is internally shorted to ground?

It is stuck LOW

98
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What is a likely indication of an internally open output?

An unpredictable output voltage

99
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What should be checked when a power supply may be causing erratic logic operation?

Supply voltage and AC ripple

100
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Which sequence best matches the lecture's PLD verification flow?

Describe/design, test/compile, simulate, program, verify