EE 4755 - synthesis and inferred hardware

What is synthesis?

Translating a hardware description into a logic implementation.

What is hardware inference?

Determining what hardware components are described by the Verilog code.

What is optimization?

Simplifying hardware while preserving its required behavior.

What is technology mapping?

Mapping inferred and optimized logic into available implementation cells.

What is explicit structural Verilog?

Code that directly instantiates gates or modules and connects them.

What is implicit structural Verilog?

Code using expressions and operators that imply hardware, such as assign y = a & b.

What is synthesizable behavioral Verilog?

Procedural code describing behavior that can be implemented in hardware, such as always_comb.

What hardware does sel ? b : a infer?

A 2-to-1 multiplexer that selects b when sel=1 and a when sel=0.

What hardware does a + b infer?

An adder.

What hardware does a == b infer?

An equality comparator.

Does declaring a logic variable automatically create a register?

No. The assignments and behavior determine what hardware is inferred.

How can a MUX with one constant-zero input be optimized?

It can often simplify to an AND gate or equivalent logic, depending on which input is zero.

What hardware does an 8-bit bitwise AND infer?

Eight independent bitwise AND operations.

What does a constant left shift infer?

Fixed bit connections and zero-filled positions, rather than necessarily a variable shifter.