DIGITAL CIRCUITS

AND Gate

Outputs 1 when both inputs are 1

OR Gate

Outputs 1 when at least one input is 1.

NOT Gate

Inverts the input. A 1 becomes 0 and a 0 becomes 1.

NAND Gate

An AND gate followed by NOT. Outputs 0 only when all inputs are 1.

NOR Gate

An OR gate followed by NOT. Outputs 1 only when all inputs are 0.

XOR Gate

Outputs 1 when the inputs are different.

XNOR Gate

Outputs 1 when the inputs are the same.

Multiplexer (MUX)

Selects one of several inputs and connects the selected input to a single output.

Demultiplexer (DEMUX)

Takes one input and routes it to one of several outputs.

Encoder

Converts an active input into a binary code.

Priority Encoder

An encoder that assigns priority when multiple inputs are active.

Decoder

Converts a binary input code into one of several outputs.

Comparator

Compares two binary values and determines whether A>B, A=B, or A<B.

Half Adder

Adds two 1-bit binary numbers and produces a Sum and Carry output.

Full Adder

Adds two binary bits plus a carry-in and produces a Sum and Carry-out.

Ripple-Carry Adder

A multi-bit adder made by connecting full adders so each carry feeds the next stage.

Carry-Lookahead Adder

A faster adder that calculates carry signals without waiting for each previous stage.

Half Subtractor

Subtracts one binary bit from another and produces Difference and Borrow outputs.

Full Subtractor

Subtracts two bits while also including a borrow-in.

Barrel Shifter

A circuit that shifts a binary word by multiple positions in a single operation.

ALU (Arithmetic Logic Unit)

A circuit that performs arithmetic and logic operations such as addition, subtraction, AND, OR, and comparisons.

Combinational Logic

Logic whose output depends only on the current inputs.

Sequential Logic

Logic whose output depends on current inputs and previously stored state.

Latch

A level-sensitive circuit that stores one bit of information.

SR Latch

A basic memory circuit with Set and Reset inputs.

D Latch

A latch that stores the value of D when its enable signal is active.

Flip-Flop

An edge-triggered circuit that stores one bit.

D Flip-Flop (DFF)

Copies the D input to the Q output when the active clock edge occurs.

JK Flip-Flop

A flip-flop similar to an SR flip-flop that can also toggle its output.

T Flip-Flop

A flip-flop that toggles its output when T is active.

Register

A group of flip-flops used to store multiple bits.

Shift Register

A register that moves stored bits left or right on clock edges.

Counter

A sequential circuit that changes its binary value in response to clock pulses.

Up Counter

A counter that increases its value each clock cycle.

Down Counter

A counter that decreases its value each clock cycle.

Up/Down Counter

A counter capable of counting both upward and downward.

Ring Counter

A shift register where the output of the final stage feeds back into the first stage.

Johnson Counter

A ring counter where the inverted output of the final stage feeds back into the first stage.

Clock

A periodic digital signal used to synchronize sequential circuits.

Clock Period

The amount of time required for one complete clock cycle.

Clock Frequency

The number of clock cycles occurring per second, measured in hertz.

Rising Edge

The transition of a digital signal from 0 to 1.

Falling Edge

The transition of a digital signal from 1 to 0.

Duty Cycle

The percentage of one clock period that the clock signal remains high.

Setup Time

The minimum amount of time data must remain stable before a flip-flop's clock edge.

Hold Time

The minimum amount of time data must remain stable after a flip-flop's clock edge.

Clock-to-Q Delay

The delay between a clock edge and the corresponding change at a flip-flop's Q output.

Clock Skew

The difference in clock arrival time between different sequential elements.

Clock Jitter

Small variations in the timing of clock edges from their expected positions.

Metastability

A temporary unpredictable state that can occur when a flip-flop violates setup or hold time.

Propagation Delay

The amount of time required for a change at a circuit input to affect the output.

Critical Path

The longest-delay combinational path in a synchronous circuit and therefore a major factor limiting maximum clock frequency.

Timing Path

A path through the circuit whose delay is analyzed to determine whether timing requirements are satisfied.

Finite State Machine (FSM)

A sequential circuit whose behavior depends on its current state and inputs.

State

The stored condition of a finite state machine at a particular moment.

Next State

The state an FSM will enter after the next active clock edge.

State Transition

The movement of an FSM from one state to another.

State Register

A collection of flip-flops that stores the current state of an FSM.

Moore Machine

An FSM whose outputs depend only on the current state.

Mealy Machine

An FSM whose outputs depend on both the current state and current inputs.

State Encoding

The method used to assign binary values to FSM states.

Reset

A signal that forces a sequential circuit into a known starting state.

Synchronous Reset

A reset that only takes effect on the active clock edge.

Asynchronous Reset

A reset that takes effect immediately without waiting for the clock.

Active-High Reset

A reset signal that is asserted when its value is 1.

Active-Low Reset

A reset signal that is asserted when its value is 0.

Enable

A control signal that determines whether a circuit is allowed to perform an operation.

Bit

A single binary digit that can have a value of 0 or 1.

Bus

A group of digital signals used together to carry multiple bits.

Word

A group of bits treated as a single piece of data.

MSB (Most Significant Bit)

The bit with the highest place value in a binary number.

LSB (Least Significant Bit)

The bit with the lowest place value in a binary number.

Binary

A base-2 number system using only the digits 0 and 1.

Hexadecimal

A base-16 number system commonly used as a compact representation of binary values.

Unsigned Number

A binary number representation where all bits represent magnitude.

Signed Number

A binary number representation capable of representing positive and negative values.

Two's Complement

The most common method for representing signed binary integers.

Overflow

A condition where the result of an arithmetic operation cannot fit in the available number of bits.

Carry

A bit produced when binary addition exceeds the capacity of a digit position.

Borrow

A value taken from a higher bit position during binary subtraction.

Sign Extension

Extending a signed binary number by copying its sign bit into the new upper bits.

Zero Extension

Extending an unsigned binary number by adding zeros to the upper bits.

Boolean Algebra

A mathematical system used to analyze and simplify digital logic.

Truth Table

A table showing the output of a logic function for every possible input combination.

De Morgan's Laws

Boolean identities used to convert AND operations to OR operations and vice versa when complements are applied.

Minterm

A Boolean product term that corresponds to exactly one row of a truth table where the output is 1.

Maxterm

A Boolean sum term that corresponds to exactly one row of a truth table where the output is 0.

Sum of Products (SOP)

A Boolean expression consisting of ORed product terms.

Product of Sums (POS)

A Boolean expression consisting of ANDed sum terms.