is a general- purpose register that holds a part of the result from a multiplication or part of the dividend before a division.
RDX (data)
2
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On the descriptor, it indicates the starting location of the memory segment.
Base address
3
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This register is used for instructions such as multiplication, division, and some of the adjustment instructions.
RAX (accumulator)
4
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indicate the condition of the microprocessor and control its operation.
RFLAGS
5
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This segment holds code (programs and procedures) used by the microprocessor and defines the starting address of the section of memory holding code.
CS (code)
6
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This flag bit activates if a word or doubleword is addressed on a non-word or non-doubleword boundary.
AC (alignment check)
7
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addresses the next instruction in a section of memory defined as (instruction pointer) a code segment.
RIP (instruction pointer)
8
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This segment is an additional data segment that is used by some of the string instructions to hold destination data.
ES (extra)
9
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________ (destination index)- often addresses string destination data for the string instructions.
RDI
10
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allows the microprocessor to address only the first 1M byte of memory space.
Real mode operation
11
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register that often addresses source string data for the string instructions.
RSI (source index)
12
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are supplemental segment registers available in the 80386- Core2 microprocessors to allow two additional memory segments for access by programs.
FS and GS segments
13
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This segment is a section of memory that contains most data used by a program.
DS (data)
14
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This flag indicates that the Pentium- Pentium 4 microprocessors support the CPUID instruction.
ID (identification)
15
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This segment defines the area of memory used for the stack.
SS (stack)
16
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This provides information about a virtual mode interrupt for the interrupt pending) Pentium- Pentium 4 microprocessors.
VIP (virtual interrupt pending)
17
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addresses an area of memory called the stack.
RSP (stack pointer)
18
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This is a copy of the interrupt flag bit available to the Pentium- Pentium 4 microprocessors.
VIF (virtual interrupt)
19
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is the actual memory location accessed by a program.
Physical address
20
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points to a memory location in all versions of the microprocessor for memory data transfers.
RBP (base pointer)
21
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is the count of ones in a number expressed as even or odd.
P (parity)
22
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Holds the carry after addition or the borrow after subtraction.
C (carry)
23
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This register sometimes holds the offset address of a location in the memory system in all versions of the microprocessor.
RBX (index)
24
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Is used in protected mode operation to select the privilege level for I /O devices.
IOPL (I /O privilege level)
25
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This flag is used with debugging to control the resumption of execution after the next instruction.
RF (resume)
26
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is a general- purpose register that also holds the count for various instructions.
RCX (count)
27
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This flag occurs when signed numbers are added or subtracted.
O (overflow)
28
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requests the access privilege level of a memory segment.
Requested Privilege Level (RPL)
29
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The ________ provides the system with information about the Pentium microprocessor, such as its version number and manufacturer.
CPUID instruction
30
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This flag indicates that the current task is nested within another task in protected mode operation.
NT (Nested Task)
31
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invisible registers- registers that are not directly addressed by software.
Program
32
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holds the arithmetic sign of the result after an arithmetic or logic instruction executes.
S (Sign)
33
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The carry flag also indicates ________, as dictated by some programs and procedures.
error conditions
34
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This flag selects either the increment or decrement mode for the DI and /or SI registers during string instructions.
D (direction)
35
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other name of offset address.
Displacement
36
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Shows that the result of an arithmetic or logic operation is zero.
Z (zero)
37
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This flag bit selects virtual mode operation in a protected mode system.
VM (virtual mode)
38
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locates the next instruction within the code segment.
Instruction pointer
39
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This flag controls the operation of the INTR (interrupt request) input pin.
I (interrupt)
40
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TTL
Transistor to Transistor Logic.
41
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selects any location within the 64K byte memory segment.
Offset address
42
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is any memory that stores information.
Cache
43
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is defined as the address generated by a program.
Linear address
44
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allows any physical memory location to be assigned to any linear address.
Memory paging mechanism
45
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is one that can be placed into any area of memory and executed without change.
Relocatable program
46
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Generate memory addresses when combined with other registers in the microprocessor.
SEGMENT REGISTERS
47
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Descriptor zero where it must contain all zeros, and may not be used for accessing memory.
Null descriptor
48
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defines the start of the code segment.
Code segment register
49
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is used in protected mode operation to select the privilege level for I/O devices. If the ________ is lower than the current privilege level, an interrupt occurs, causing execution to suspend.
I/O privilege level (IOPL)
50
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CISC
(Complex Instruction Set Computer)
51
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RISC
(Reduced Instruction Set Computer)
52
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EPIC
(Explicitly Parallel Instruction Computing)
53
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ISA
(industry standard architecture)
54
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EISA
(extended ISA)
55
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EMS
(Extended Memory System)
56
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VGA
Variable Graphics Array
57
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VESA
Video Electronics Standards Association
58
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USB
(universal serial bus)
59
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AGP
(advanced graphics port)
60
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SATA
(Serial A dvanced Technology Attachment)
61
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ATA
Advanced Technology Attachment
62
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DOS
(disk operating system)
63
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CD-ROM memory
(Compact Disk Read-Only Memory)
64
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DVD
(Digital Versatile Disk)
65
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BIOS
Basic Input/Output System
66
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MMX
Multimedia Extension
67
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Digital Equipment Corporation
DEC
68
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WYSIWYG
What You See Is What You Get
69
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TTL
Transistor to Transistor Logic
70
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RTL
Resistor-Transistor Logic
71
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SIMD
Single Instruction Multiple Data
72
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AMD
Advanced Micro Devices
73
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ENIAC
(Electronic Numerical Integrator and Calculator)
74
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FORTRAN
(FORmula TRANslator)
75
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ALGOL
(ALGOrithmic Language)
76
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COBOL
(COmputer Business Oriented Language)
77
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RPG
(Report Program Generator
78
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TPA
(transient program area),
79
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XMS
(extended memory system)
80
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MSDOS
(Microsoft disk operating system)
81
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PCDOS
(personal computer disk operating system)
82
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IORC
(I/O read control)
83
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IOWC
(I/O write control)
84
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MRDC
(memory read control)
85
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MWTC
(memory write control)
86
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ASCII
(American Standard Code for Information Interchange)
87
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BCD
Binary-coded decimal
88
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ALU
Arithmetic logic unit
89
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VLSI
very large scale integration
90
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SRAM
Static RAM
91
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DRAM
Dynamic RAM
92
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This register is used for instructions such as multiplication, division, and some of the adjustment instructions
RAX (accumulator)
93
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This register sometimes holds the offset address of a location in the memory system in all versions of the microprocessor
RBX (index)
94
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is a general-purpose register that also holds the count for various instructions
RCX (count)
95
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is a general-purpose register that holds a part of the result from a multiplication or part of the dividend before a division
RDX (data)
96
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points to a memory location in all versions of the microprocessor for memory data transfers
RBP (base pointer)
97
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often addresses string destination data for the string instructions
RDI (destination index)
98
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register that often addresses source string data for the string instructions
RSI (source index)
99
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These registers are only found in the Pentium 4 and Core2 if 64-bit extensions are enabled
R8 through 15
100
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stores data through this pointer and is explained later in the text with the instructions that address stack data