Embedded Previous Exam 1

1. What architecture does the Raspberry Pi 4 use?

ARM 8 Cortex-A72

2. Which processor does the Raspberry Pi 4 use?

Broadcom (BCM) 2711

3. The RP4 is missing one important function. What?

RTC

4. Three things the CPU core must do

Manipulate data, be controlled by instructions, move data

5. What is the clock speed of the RP4?

1.5 GHz

6a. Harvard architecture (4 traits)

Takes more area to implement; highest performance; typically used for on-chip cache; allows simultaneous instruction and data access

6b. Von Neumann architecture (2 traits)

Typically used for main memory; most optimal for processor pinout

7. In the ARM CPU architecture, the PC is…

A special register that stores the address of the next instruction

8. What is the most powerful thing a computer can do?

Repeat a set of operations until a condition is met

9. What language does the ARM8 (or any processor) run?

Binary opcode

10. Characteristics of ARM RISC architecture

Load/store architecture, 32-bit instructions, primarily CPI = 1

11a. Flowcharts (3 traits)

Symbolic; better for smaller code jobs; too much detail is bad

11b. Pseudocode (3 traits)

Natural text; better for larger code jobs; flexible level of detail

12. T/F: The primary function of the assembler is to convert readable assembly to binary machine code

True

13. The makefile… (select all)

Helps with file management; automatically uses the files it needs based on what changed; automates the software building procedure; controls the generation of executables

14. Primary tools for assembly programming in Linux on the RP4

GCC and GDB

15a. Can be 1 or 0

Bit

15b. 4 bits

Nibble

15c. 8 bits

Byte

15d. 16 bits

Half word

15e. 32 bits

Word

16. Decimal 220 in binary (8-bit unsigned)

11011100

17a. Decimal 63789 in hex (16-bit unsigned)

F92D

17b. Decimal 63789 in binary (16-bit unsigned)

1111100100101101

18. Hex 8235 (16-bit unsigned) in decimal

33333

19. Hex F1 in decimal

Not enough information

20. Hex FFFF (16-bit signed) in decimal

-1

21. Hex FF01 (16-bit signed) in decimal

-255

22a. 16-bit two's complement: -1

FFFF

22b. 16-bit two's complement: most negative

8000

22c. 16-bit two's complement: largest positive

7FFF

22d. 16-bit two's complement: 0

0000

23. Implementing C = A - B in assembly (A and B >= 0)

The answer is always correct as long as A > B; the answer is always correct for signed numbers

24. One value in an equation is negative, or the result is negative

You must be using signed numbers

25. T/F: For the square wave, it does not matter which library is called for the GPIO

False

26. 30 registers exist in ARMv8, you access 15. Which are available and not reserved?

R0-R12

27. T/F: In ARM8 RISC, data memory can only go to and from registers

True

28a. General purpose register example

R2

28b. Stack pointer

R13

28c. Link register

R14

28d. Program counter

R15

29. In the R-format instruction, how many registers are addressable by the Rd field?

32

30. ARM8 immediate-format data can be…

16 bits or less

31. An instruction that lets the compiler make cumbersome operations easier

Pseudo instruction

32a. Directive: assign a constant value to a name

.EQU

32b. Directive: assign a name to a register

.REQ

32c. Directive: define a value as 8 bits

.byte

32d. Directive: define a value as 2 bytes

.half

32e. Directive: reserve a byte in memory

.space

32f. Directive: pull an external file into the current file before assembly

.include

32g. Directive: defines the instruction area

.text

32h. Directive: defines the data area

.data

33. What register holds the flags?

CPSR

34. Which instructions change the flags?

ADDS, SUBS, CMP

35a. Flag set if the MSB (sign bit) is set

N flag

35b. Flag set if the result is zero

Z flag

35c. Flag set on addition overflow (carry) and on subtraction if no borrow occurs

C flag

35d. Flag set for signed numbers when a positive looks negative or a negative looks positive

V flag

36. What does a branch instruction do if taken?

Changes the program counter

37. Branch instructions (not including BX)… (select all)

Can jump forward or backward; provide jump addresses +/- relative to the PC; are considered short jumps; if conditional, depend on an instruction that affects the flag bits

38. What does BX R0 do?

Loads the value in R0 into the program counter (note: your copy of the guide also marks "has no effect on the program counter"; confirm the keyed answer)

39. T/F: We can assume over 80% of all branches are taken

True

40. Why is it reasonable to estimate all branches take one cycle?

Over 80% of branches are taken; the ARM8 processor has very good branch prediction

41. Default PC increment for the next instruction (bytes)

4

42. T/F: In the RP4 everything is memory mapped including I/O

True

43a. Flash memory

"Permanent" program storage; holds value independent of power

43b. SRAM

Cache memory; maintains value while powered without refresh

43c. DRAM

Maintains value and requires refresh; lowest cost per bit

44. Which byte ordering does ARM8 use by default?

Little endian

45. What are the ARM8 addressing modes?

Immediate, register indirect, scaled register, register direct

46. T/F: ARM instructions are always on 4-byte boundaries

True

47. Flags Z=1, C=0, N=0, V=0 mean

Result is zero

48. Flags Z=0, C=1, N=0, V=0: possible conditions

An addition results in a carry; an unsigned subtraction or CMP results in no borrow

49. Signed instruction, flags Z=0, C=0, N=1, V=1

A positive signed number looks negative

50. Signed instruction, flags Z=0, C=1, N=0, V=1

A signed negative number looks positive

51. mov r0,#0 / mov r6,#1 / L1: add r0,r0,r6 / add r6,r6,#1 / subs r7,r6,#5 / bcc L1. When does the branch occur?

When r6 < 5

52a. .equ data1, 0xFEDCBA98: result of ldr r3, data1

Error in the instruction

52b. .equ data1, 0xFEDCBA98: result of ldr r1, =data1

r1 = 0xFEDCBA98

52c. .equ data1, 0xFEDCBA98: result of mov r5, #data1

Error in the instruction (mov is limited to 8-bit values)

52d. .equ data2, 0xFEDC: result of mov r4, #data2

r4 = 0xFEDC

52e. .equ data1, 0xFEDCBA98: result of ldr r2, =data1

r2 = 0xFEDCBA98