Unit 4: Data Operations

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Vocabulary flashcards covering bit-level and pattern-level logic operations, adder circuit architectures, two's complement integer arithmetic, floating-point arithmetic procedures, and shift operations.

29 Terms

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Unary Operator

A logic operator that accepts only one binary bit as input and produces one bit of result, such as the NOT operator.

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Binary Operator

A logic operator that accepts exactly two binary bit inputs to produce one bit of result, such as AND, OR, XOR, NAND, NOR, and XNOR.

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NOT Operator

A unary logic operator whose output bit is the complement of the input, flipping 00 to 11 and 11 to 00.

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AND Operator

A binary operator that produces an output bit of 11 if both inputs are 1s1\text{s}, and 00 in all other cases; if any input is 00, the result is immediately 00.

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OR Operator

A binary operator (also called inclusive-or) that produces an output bit of 00 if both inputs are 0s0\text{s}, and 11 if either or both inputs are 1s1\text{s}.

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XOR Operator

A binary operator (pronounced 'exclusive-or') that outputs 00 when both inputs are identical and 11 when the inputs are different; it can selectively invert bits.

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XNOR Operator

A binary operator that acts as the reverse (NOT) of XOR, producing an output of 00 if and only if both bits are not equal, and 11 if both bits are equal.

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NAND Operator

A logic operator that applies AND to its input bits and inverts the output with NOT; the result is 00 if and only if both input bits are 11, and 11 otherwise.

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NOR Operator

A logic operator that applies OR to its input bits and inverts the output with NOT; the result is 00 if either input bit is 11, and 11 if both are 00.

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Mask

A secondary bit pattern applied in bitwise logic operations to selectively unset, set, or flip specific target bits within an input pattern.

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Unsetting Specific Bits

An application of the AND operator using a mask, where mask 0-bits0\text{-bits} force corresponding input bits to 00 and mask 1-bits1\text{-bits} leave input bits unchanged.

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Setting Specific Bits

An application of the OR operator using a mask, where mask 1-bits1\text{-bits} force corresponding input bits to 11 and mask 0-bits0\text{-bits} leave input bits unchanged.

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Flipping Specific Bits

An application of the XOR operator using a mask, where mask 1-bits1\text{-bits} invert (complement) corresponding input bits and mask 0-bits0\text{-bits} leave them unchanged.

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Half Adder

A basic 1-bit addition circuit that takes two 1-bit inputs (AA and BB) and produces two outputs (Sum=A⊕B\text{Sum} = A \oplus B and Carry=A⋅B\text{Carry} = A \cdot B), only suitable for the least significant bit because it lacks a carry-in input.

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Full Adder

A complete 1-bit addition circuit accepting three inputs (AA, BB, and carry-in CinC_{in}) and producing two outputs (Sum=A⊕B⊕Cin\text{Sum} = A \oplus B \oplus C_{in} and Cout=A⋅B+(A⊕B)⋅CinC_{out} = A \cdot B + (A \oplus B) \cdot C_{in}), constructed from two half adders and an OR gate.

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Ripple Carry Adder

A multi-bit adder formed by chaining nn full adders together, where the carry-out (CoutC_{out}) of each lower bit connects directly to the carry-in (CinC_{in}) of the subsequent higher bit.

<p>A multi-bit adder formed by chaining $$n$$ full adders together, where the carry-out ($$C_{out}$$) of each lower bit connects directly to the carry-in ($$C_{in}$$) of the subsequent higher bit.</p>
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Two's Complement Subtraction

The process of computing A−BA - B in modern computers by taking the two's complement of the second number and adding it to the first (A+(Bˉ+1)A + (\bar{B} + 1)), discarding any carry produced past the allocated bit length.

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Arithmetic Overflow

A condition occurring when an arithmetic calculation produces a result outside the representable storage range for an allocated N-bitN\text{-bit} allocation (−2N−1≤x≤2N−1−1-2^{N-1} \le x \le 2^{N-1}-1).

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Positive Overflow

An overflow condition in signed integer arithmetic that occurs when a calculated result exceeds the maximum representable value (2N−1−12^{N-1}-1).

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Negative Overflow

An overflow condition in signed integer arithmetic that occurs when a calculated result is strictly less than the minimum representable value (−2N−1-2^{N-1}).

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Denormalization

The floating-point arithmetic preparation step of restoring the implicit hidden 11 back into the mantissa and incrementing the exponent.

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Exponent Alignment

The procedure in floating-point addition and subtraction where the smaller exponent is incremented and its mantissa is shifted to the right until both operands have matching exponents.

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Underflow Gap

The numerical interval between −fminN-f_{minN} and fminNf_{minN}, representing magnitudes smaller than the minimum positive number that a computer system can represent.

<p>The numerical interval between $$-f_{minN}$$ and $$f_{minN}$$, representing magnitudes smaller than the minimum positive number that a computer system can represent.</p>
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Flush-to-Zero Underflow

An underflow handling method in earlier computer designs where any arithmetic result falling inside the underflow gap interval (−fminN,fminN-f_{minN}, f_{minN}) is automatically set to zero.

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Logical Shift Operation

A bit shifting operation applied to bit patterns that do not represent signed numbers, divided into simple shifts and circular shifts.

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Simple Shift

A logical shift operation where bits shift one position left or right, the bit exiting the boundary is discarded, and a 00 fills the vacated bit position at the opposite end.

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Circular Shift (Rotate Operation)

A logical shift operation where bits move one position left or right without loss; the bit shifted out of one end wraps around to fill the vacated bit position at the other end.

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Arithmetic Right-Shift Operation

A shift operation on two's complement integers that moves every bit one position to the right, discarding the rightmost bit while preserving and replicating the leftmost sign bit, effectively dividing by 22.

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Arithmetic Left-Shift Operation

A shift operation on two's complement integers that moves every bit one position to the left, discarding the MSB and filling the rightmost bit with 00, effectively multiplying by 22 when no overflow occurs.