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Which of the following statements about MOS capacitors is FALSE?
I. For a p-type MOS, a negative gate voltage is needed to drive the MOS capacitor into inversion.
II. An n-type MOS capacitor with a large positive gate voltage and the body grounded would be biased into accumulation.
III. Depletion-mode NMOS transistors have a negative threshold voltage.
IV. A p-type MOS capacitor biased in depletion mode would drive a PMOS transistor in the linear region of operation.
I. TRUE – A p-type MOS capacitor requires a sufficiently negative gate voltage to attract holes away and create an inversion layer of electrons.
II. FALSE – A large positive gate voltage on an n-type MOS capacitor causes depletion, followed by inversion, not accumulation. Accumulation occurs with a negative gate voltage.
III. TRUE – Depletion-mode NMOS transistors have a negative threshold voltage because they conduct even when the gate-to-source voltage is zero.
IV. FALSE – A p-type MOS capacitor in depletion does not necessarily drive a PMOS transistor into the linear region; the linear region depends on the PMOS gate-to-source and drain-to-source voltages.
Which of the following conditions would bias an enhancement-type PMOS transistor in saturation?
A. VGS≤VTH and VGD≥VTH
B. VSG≥VTH and VDG≤VTH
C. VGS≤VTH and VGD≤VTH
D. VSG≥∣VTH∣ and VGD≤∣VTH∣
A. VGS≤VTH and VGD≥VTH
For an enhancement-type PMOS transistor with negative threshold voltage VTH, turning the channel ON requires VGS≤VTH (or VSG≥∣VTH∣). Saturation occurs when the drain end of the channel is pinched off, which requires VGD≥VTH (or VSD≥VSG−∣VTH∣).
In a source stabilized MOSFET biasing circuit, the source resistor provides:
A. Negative feedback that stabilizes the drain current
B. Positive feedback that stabilizes the drain current
C. A constant gate-source voltage
D. A reduction in the gate-source voltage
A. Negative feedback that stabilizes the drain current
Any increase in drain current increases the voltage drop across the source resistor VS=IDRS, which reduces VGS=VG−VS and opposes the initial rise in current, providing negative feedback stabilization.
The ID-VDS characteristic curves of a MOSFET helps determine:
A. The maximum voltage gain
B. The DC load line and DC operating point
C. The appropriate biasing circuit to use
D. The amplifier topology
B. The DC load line and DC operating point
Plotting the circuit's DC load line equation on the MOSFET's ID-VDS output characteristic family of curves allows graphical determination of the steady-state DC operating point (Q-point).
For a depletion-mode PMOS transistor to act as a linear amplifier, it must operate in:
A. Cutoff region
B. Saturation region
C. Linear region
D. Depletion region
B. Saturation region
To act as an amplifier, any MOSFET (enhancement or depletion mode) must operate in its saturation region where drain current is controlled by gate voltage and independent of VDS.
For a PNP BJT configured as a common-collector amplifier with a sinusoidal signal injected into its input. What region of operation the BJT is crossing if the output sinusoid has a positive clipping?
A. Cut-off
B. Saturation
C. Forward-Active
D. Linear
A. Cut-off
In a PNP common-collector (emitter follower) amplifier with the emitter driving the load resistor to ground, the output voltage follows the base voltage (VE=VB+VEB). As the input voltage goes positive, VEB decreases until the emitter-base junction becomes reverse-biased, turning the transistor OFF and causing positive output clipping at cut-off.
Which of the following statements is false about the BJT DC biasing techniques?
A. Current gain dependence is fixed in both fixed-base bias and voltage divider without the emitter resistor.
B. β dependence can be neglected if RE=1 kΩ, β=250, and RB=25 kΩ for an emitter stabilized bias circuit.
C. Voltage divider biasing has strong current gain dependence if the base current is negligible to the current across the divider resistors.
D. Emitter-stabilized and voltage divider biasing with emitter resistor has no β dependence if the emitter resistor is very large assuming that the transistor stays in forward-active.
C. Voltage divider biasing has strong current gain dependence if the base current is negligible to the current across the divider resistors.
When base current is negligible relative to the divider current, the base voltage VB is fixed independently of β, making the Q-point highly stable and practically independent of current gain.
In a BJT, if the base-emitter junction is forward biased and the base-collector junction is also forward biased. What is the operating mode?
a. cut-off
b. forward active
c. saturation
d. reverse active
c. saturation
When both the base-emitter and base-collector pn junctions are forward biased, the BJT operates in the saturation region, allowing maximum current to flow with a minimal collector-emitter saturation voltage.
In a BJT, if the base-emitter junction is forward biased and the collector-base junction is reverse biased. What is the operating mode?
a. cut-off
b. reverse active
c. saturation
d. forward active
d. forward active
Forward-biasing the base-emitter junction allows carriers to be injected into the base, while reverse-biasing the collector-base junction sweeps those carriers into the collector, defining the forward active mode used for amplification.

For a BJT in active mode as shown in the figure below, what is the iC ?
a. αiE
b. iC+ICO
c. α(iC+iB)+ICO
d. α(iC+iB)−ICO
c. α(iC+iB)+ICO
In forward-active mode, the total collector current is the fraction α of emitter current reaching the collector plus the reverse leakage current ICO, giving iC=αiE+ICO. Substituting Kirchhoff's current law (iE=iC+iB) yields iC=α(iC+iB)+ICO.
In a BJT, base width modulation occurs when there is a large reverse bias across the CB junction. Which of the following is not a result of base width modulation?
a. Increases the base width
b. Reduces the base width
c. Reduces the recombination in the base area
d. Increases collector current
Answer: (a)
-- Increasing the reverse bias across the collector-base junction expands the depletion region, which decreases (not increases) the effective neutral base width.
For silicon NPN BJT that is configured to operate in the saturation mode, which of the following statements is false?
a. If vBE=0.7 V, then VCEsat≅0.2 V.
b. The transistor is well into saturation at vBC≅0.5 V.
c. If vBE=0.7 V, then VCEsat≅0.7 V.
d. The cut-in voltage of the collector-base diode is when vBC≅0.4 V.
(c) If vBE=0.7 V, then VCEsat≅0.7 V.
-- In saturation, VCEsat is typically around 0.2 V, making VCEsat≅0.7 V false.
The MOS capacitor in an NMOS transistor exists between
a. Gate and Drain
b. Gate and Bulk
c. Gate and Source
d. Source and Drain
(b) Gate and Bulk
-- The fundamental metal-oxide-semiconductor capacitor structure is formed across the gate electrode and the underlying bulk (substrate) semiconductor separated by the oxide layer.
In the MOS capacitor of an enhancement mode PMOS transistor, at which condition does depletion occur?
a. VGS<VTH
b. VTH<VGS<0
c. VGS>0
d. VSG>∣VTH∣
(b) VTH<VGS<0
-- Depletion occurs in an enhancement PMOS transistor when the gate voltage is slightly negative relative to the source but not yet lower than the negative threshold voltage VTH required to form an inversion layer.
In an enhancement mode NMOS transistor, an inversion channel occurs if:
a. VGS<VTH
b. VGS≥VTH
c. VGS<0
d. VGS=0
(b) VGS≥VTH
-- An inversion channel forms in NMOS when gate-to-source voltage equals or exceeds the threshold voltage[cite: 5].
Which of the following statements is false for a depletion mode MOSFET?
a. A channel pre-exists underneath the oxide layer. The channel is created during device fabrication.
b. Current cannot flow between drain and source even if there is no gate-to-source voltage.
c. For an NMOS depletion mode MOSFET, the gate-to-source voltage is used to reduce current flow in the channel. This is done by placing the MOS capacitor in depletion mode.
d. For the PMOS depletion mode MOSFET, to place the capacitor in depletion mode and reduce current flow, 0<VGS<VTH.
A. TRUE – A depletion-mode MOSFET has a pre-existing channel formed during fabrication.
B. FALSE – Current can flow between drain and source even when VGS=0VGS=0 because the channel already exists.
C. TRUE – For an NMOS depletion-mode MOSFET, a negative gate-to-source voltage depletes electrons from the channel, reducing current.
D. TRUE – For a PMOS depletion-mode MOSFET, an appropriate positive gate-to-source voltage depletes holes from the channel, reducing current.
For an NMOS transistor, this occurs when vDS is increased beyond VDSAT. The length of the depletion region between the pinch-off point and the drain increases.
a. Early Effect
b. Saturation
c. Channel Length Modulation
d. Inversion
(c) Channel Length Modulation
-- Increasing vDS past saturation widens the drain depletion region and shortens the effective channel length
Which of the following statements are false for a BJT?
a. β increases as temperature increases.
b. VBE increases as temperature increases.
c. ICO increases as temperature increases.
d. α increases as temperature increases.
(b) VBE increases as temperature increases.
-- VBE has a negative temperature coefficient, meaning it decreases as temperature increases.
In a BJT, collector current is mainly controlled by:
A. Collector voltage
B. Base current
C. Emitter voltage
D. Temperature only
(B) Base current
-- The collector current in a bipolar junction transistor is proportional to and primarily controlled by the base current (IC=βIB).
The input of a common-emitter amplifier is applied to:
A. Emitter
B. Collector
C. Base
D. Ground
C. Base
-- In a common-emitter configuration, the signal is applied to the base terminal while the emitter is shared between input and output.
In cutoff mode, the transistor behaves as:
A. Open switch
B. Closed switch
C. Amplifier
D. Rectifier
A. Open switch
-- In cutoff mode, both junctions are reverse biased so negligible current flows, acting like an open switch.
A coupling capacitor blocks:
A. AC
B. DC
C. Both
D. Noise
B. DC
-- A coupling capacitor blocks DC signals while allowing AC signals to pass through.
The threshold voltage VTH is the value of VGS that:
A. Starts inversion channel
B. Stops conduction
C. Maximizes current
D. Breaks oxide
A. Starts inversion channel
-- The threshold voltage VTH is the minimum gate-to-source voltage required to create an inversion channel for conduction.
In CE amplifier, voltage gain sign is:
A. Positive
B. Negative
C. Zero
D. Undefined
B. Negative
-- A common-emitter amplifier introduces a 180-degree phase shift between input and output voltage, making the voltage gain negative.
Early effect causes:
A. Decrease in collector current
B. Increase in collector current with vCE
C. No effect
D. Beta drop to zero
B. Increase in collector current with vCE
-- Early effect narrows the effective base width as vCE increases, causing collector current to rise slightly rather than remaining perfectly constant.
The condition for MOSFET saturation is:
A. VDS>VGS−VTH
B. VDS<VGS−VTH
C. VDS=0
D. VGS=0
A. VDS>VGS−VTH
-- An NMOS transistor enters saturation when the drain-to-source voltage exceeds the overdrive voltage VGS−VTH .
The transconductance of a MOSFET is proportional to:
A. VGS−VTH
B. (VGS−VTH)2
C. VDS
D. None
A. VGS−VTH
-- In saturation, the transconductance is gm=kn′(W/L)(VGS−VTH), which is directly proportional to the overdrive voltage VGS−VTH.
The MOSFET in triode region behaves like:
A. Voltage-controlled resistor
B. Current source
C. Open circuit
D. Amplifier
A. Voltage-controlled resistor
-- In the triode region with small VDS, the channel resistance between drain and source is controlled by the gate-to-source voltage VGS.
If VGS<VTH in NMOS:
A. Cutoff region
B. Triode region
C. Saturation
D. Breakdown
A. Cutoff region
-- When VGS<VTH, no conducting channel is formed, placing the NMOS transistor in the cutoff region.
The Q-point defines:
A. AC signal range
B. Operating point for DC bias
C. Cutoff condition
D. Amplifier gain
B. Operating point for DC bias
-- The Q-point (quiescent point) sets the steady-state DC voltage and current conditions of a transistor circuit in the absence of an AC input signal.
The Early voltage (VA) represents:
A. Collector saturation voltage
B. Output resistance indicator
C. Base potential
D. Threshold voltage
B. Output resistance indicator
-- The Early voltage VA determines the slope of the output characteristic curves and directly defines the small-signal output resistance ro=ICVA.
In MOSFETs, increasing VDS beyond saturation
A. Greatly increases ID
B. Slightly increases ID
C. Decreases ID
D. Turns off device
B. Slightly increases ID
-- Due to channel length modulation, increasing VDS beyond saturation causes a small linear increase in drain current ID.
In MOSFET amplifiers, the gate current is:
A. Zero (ideally)
B. Equal to drain current
C. Proportional to VGS
D. High at cutoff
A. Zero (ideally)
The transconductance of a BJT is proportional to:
A. IC
B. VBE
C. β
D. Temperature
A. IC
-- The transconductance of a BJT is given by gm=VTIC, which is directly proportional to the collector bias current IC.
The base width modulation effect causes:
A. Decrease in base width with VCE
B. Increase with VCE
C. Constant base width
D. No change
A. Decrease in base width with VCE
-- As reverse bias VCE increases, the collector-base junction depletion region expands into the neutral base region, effectively reducing the effective base width.
The unity-gain frequency (fT) of a transistor defines:
A. Frequency where current gain=1
B. Cutoff voltage
C. Thermal limit
D. Noise floor
A. Frequency where current gain=1
-- The unity-gain frequency fT is the frequency at which the short-circuit common-emitter current gain drops to unity.
Which amplifier has no phase inversion?
A. CE
B. CB
C. CC
D. Differential
C. CC
-- Both Common-Collector (CC) and Common-Base (CB) configurations preserve the phase of the input signal at the output with zero phase shift.