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Define Turnaround Time, Waiting Time, and Response Time.
Metrics:
Turnaround Time: Total time elapsed from process arrival to complete execution (tend−tarrival).
Waiting Time: Total time a process spends waiting in the ready queue (tturnaround−tburst).
Response Time: Time elapsed from process arrival until it is dispatched to run for the first time.
Three processes arrive at t=0 in the order P1,P2,P3 with burst times of 10, 2, and 4 seconds respectively.
Calculate average Turnaround, Waiting, and Response times under First-Come, First-Served (FCFS).
Calculate the same metrics under Round Robin (RR) with a quantum of 3 seconds.
FCFS Scheduling:
Execution order: P1(0→10), P2(10→12), P3(12→16).
Turnaround: P1=10, P2=12, P3=16. Average=310+12+16=338=12.67s.
Waiting: P1=0, P2=10, P3=12. Average=30+10+12=322=7.33s.
Response: P1=0, P2=10, P3=12. Average=30+10+12=7.33s.
Round Robin (Quantum = 3s):
Execution trace: P1(0→3), P2(3→5 finishes), P3(5→8), P1(8→11), P3(11→12 finishes), P1(12→16 finishes).
Turnaround: P1=16, P2=5, P3=12. Average=316+5+12=333=11.00s.
Waiting: P1=16−10=6, P2=5−2=3, P3=12−4=8. Average=36+3+8=317=5.67s.
Response: P1=0, P2=3, P3=5. Average=30+3+5=38=2.67s.
Compare Interrupts, Traps, and Faults in terms of synchronicity and where the Program Counter (PC) points.
Interrupt: Asynchronous hardware event (e.g., timer, device I/O). PC points to the next instruction to be executed after handling.
Trap: Synchronous software-generated event (e.g., system call). PC points to the next instruction.
Fault: Synchronous error condition (e.g., page fault). PC points to the faulting instruction itself, enabling instruction restart after resolution.
Detail the two-step execution model of an Interrupt Handler (Top-Half vs. Bottom-Half).
Top-Half vs. Bottom-Half:
Top-Half (Immediate): Runs with interrupts disabled/masked. Performs time-critical work (e.g., clearing hardware device flags, reading buffer state), cannot block, and schedules deferred work.
Bottom-Half (Deferred): Runs with interrupts unmasked. Handles non-critical data processing (e.g., memory allocation, waking waiting processes) and can be interleaved with new hardware interrupts.
What is the role of a Process Control Block (PCB) during a preemptive context switch?
The PCB stores the entire execution context of a suspended process (saved general registers, PC, stack pointer, page table root pointer). Upon context switch, the kernel writes current CPU states to the old process's PCB and restores CPU states from the newly dispatched process's PCB
Differentiate between an Atomic Operation, a Spinlock, a Semaphore, and a Mutex.
Atomic Operation: Indivisible CPU hardware-level instruction (e.g., Compare-And-Swap) guaranteed to execute completely without partial reads/writes or context switches.
Spinlock: A mutual exclusion mechanism using busy-waiting (looping on an atomic operation). Efficient for extremely short locks, but wastes CPU cycles if held long.
Semaphore: A integer counter v, process queue Q, and protecting lock s. Decrementing below 0 puts calling processes to sleep rather than spinning.
Mutex: A binary semaphore with strict ownership tracking. Only the thread that acquired the lock can release it, allowing detection of incorrect unlocking behavior.
Explain the deadlock condition shown below and state the fundamental rule to prevent it:
Thread 1: acquires Lock A → requests Lock B
Thread 2: acquires Lock B → requests Lock A
Cause: Circular dependency where Thread 1 holds Lock A waiting for Lock B, while Thread 2 holds Lock B waiting for Lock A.
Rule to Prevent: Enforce a strict global lock ordering across all threads (e.g., always acquire Lock A before Lock B)
Contrast Livelock with Starvation.
:Livelock: Active threads continually change state in response to each other (e.g., repeatedly using try_lock() and retrying) without making forward progress.
Starvation: A thread is ready to run or acquire a resource, but is indefinitely bypassed because higher-priority threads continuously take precedence.