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Vocabulary flashcards covering core concepts of Boolean algebra, logic gates, minimization methods, combinational circuits, and sequential circuits based on the lecture transcript.
Boolean Algebra
A system of mathematical logic that performs arithmetical and logical operations on digital signals represented by binary values 0 and 1.
Literals
The variables and their complements present in a Boolean expression.
Duality Principle
A rule stating that a Boolean expression remains valid if OR (+) and AND ($\cdot)operationsareinterchanged,andconstants0and1$$ are interchanged, while variables and complements remain unchanged.
Absorption Law
A Boolean theorem stating that A+AB=A and A(A+B)=A.
De Morgan's First Law
A Boolean law stating that overlineA+B=barAcdotbarB, proving that a NOR gate is equivalent to a bubbled AND gate (negative AND gate).
De Morgan's Second Law
A Boolean law stating that overlineAcdotB=barA+barB, proving that a NAND gate is equivalent to a bubbled OR gate (negative OR gate).
Universal Gate
A logic gate, such as NAND or NOR, that can be used to implement any Boolean logic operation without requiring any other type of gate.
XOR Gate
A logic gate with output Y=AoplusB=barAB+AbarB, which outputs logic 1 when the two inputs are different.
XNOR Gate
A logic gate with output Y=AodotB=AB+barAbarB, which outputs logic 1 when the two inputs are identical.
Minterm
A product term in standard Sum of Products (SOP) form containing every variable in either complemented or uncomplemented form, evaluating to 1 for a specific combination of input values.
Maxterm
A sum term in standard Product of Sums (POS) form containing every variable in either complemented or uncomplemented form, evaluating to 0 for a specific combination of input values.
Karnaugh Map (K-map)
A visual diagram tool composed of 2n cells used to minimize and simplify Boolean logic expressions for 2, 3, 4, 5, and 6 variables.
Don't Care Condition
An input condition in a logic circuit that never occurs or produces an undefined output level, which can be treated as either 0 or 1 (marked with 'X') to optimize logic simplification.
Quine-McCluskey Method
A tabular algorithmic method used to simplify Boolean expressions, particularly useful when dealing with a large number of variables.
Combinational Circuit
A logic circuit whose output depends exclusively on the present input values and contains no memory or storage elements.
Half Adder
A combinational circuit that adds two 1-bit binary inputs, producing a sum output (S=AoplusB) and a carry-out output (textCout=AB).
Full Adder
A combinational circuit that adds three 1-bit inputs (A, B, and Cin), producing a sum output (S=AoplusBoplusCin) and a carry-out output (textCout=AB+BCin+ACin).
Half Subtractor
A combinational circuit that subtracts one 1-bit input from another, producing a difference output (textDiff=AoplusB) and a borrow-out output (textBorrow=barAB).
Full Subtractor
A combinational circuit that subtracts two bits (A and B) with a borrow-in (Bin), producing a difference output (textDiff=AoplusBoplusBin) and a borrow-out output (textBout=barAB+Bin(overlineAoplusB)).
Multiplexer (MUX)
A combinational circuit (also known as a data selector or many-to-one circuit) that selects one of 2n input lines using n select lines and routes it to a single output line.
Demultiplexer (DEMUX)
A combinational circuit (one-to-many circuit) that directs a single input line to one of 2n output lines based on n select lines.
Decoder
A combinational logic circuit that converts coded digital information from n input lines into up to 2n unique output lines.
Encoder
A combinational logic circuit that performs the inverse operation of a decoder by converting up to 2n input lines into an n-bit coded output.
Sequential Circuit
A logic circuit whose output depends on both the present inputs and the past inputs stored in memory elements (present state).
Synchronous Sequential Circuit
A sequential circuit whose state transitions and operations are synchronized by a periodic timing signal known as a clock signal (clk).